Modeling of cell delay change for electronic design automation
AssigneeSynopsys, Inc.
InventorsQian-Ying TANG, Qiang CHEN, Sridhar TIRUMALA
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AssigneeSynopsys, Inc.
InventorsQian-Ying TANG, Qiang CHEN, Sridhar TIRUMALA
Estimating the term…
An integrated circuit design optimization procedure to modify a cell feature, such as gate length, models changes in delay as a result of the modification. In the delay change calculation, a characteristic of an event in cell switching behavior, such as the output short-circuit voltage VSC, is determined for the modified cell, where changes in the determined characteristic correlate with changes in delay of the cell due to the modification. Next, a value for delay of the modified cell is determined as a function of the determined characteristic of the event. The procedure can be applied after placement and routing. A timing-constrained, leakage power reduction is described using the delay change model.
A data processing system for electronic design automation, comprising:
A method for producing data for a cell library for electronic design automation, the cell library having a plurality of entries, entries in the plurality including characterizing data for a corresponding cell realizable in an initial form by a technology;
A cell library, comprising:
Dependencies are inferred from the claim text.