Memory controller, data storage device, and memory controlling method
AssigneeKabushiki Kaisha Toshiba
InventorsAkihiro Sakata, Yoshinobu Kimura
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AssigneeKabushiki Kaisha Toshiba
InventorsAkihiro Sakata, Yoshinobu Kimura
Estimating the term…
A memory controller includes a first error detection code generator for generating a first error detection code for data received from a host, a controller to write the data and the first error detection code to nonvolatile memory and to read the data and the first error detection code from the nonvolatile memory, an error detector to perform an error detection based on the data and the first error detection code that are read from the nonvolatile memory, a second error detection code generator to generate a second detection error code based on the data read from the nonvolatile memory, and a mismatch code generator to generate a mismatch code signaling the presence of an error in the data, wherein either the second error detection code or the mismatch code is selected based on the error detection and sent to the host.
A memory controller for a nonvolatile memory, comprising:
A memory control method for a nonvolatile memory, comprising the steps of:
A memory control method for a nonvolatile memory, comprising the steps of:
Dependencies are inferred from the claim text.