System and method for solid state disk flash plane failure detection
OwnerRobert Kuboinventor
Life of this patent
Estimating the term…
Abstract
A system and method for early detection and reporting of an impending NAND Flash device plane failure. Each time that a data unit is retrieved from a NAND Flash array the number of bits in error and the memory location associated with the errors is observed. if the number of bits in error or the error rate for a memory location exceeds a threshold of the number of bits in error per data, retrieval, or number of bits in error per data unit per unit time, a NAND Flash plane failure Patrol Read operation is performed at the memory location, regardless of where in the cycle the Patrol Read function is in a scrub of the overall NAND Flash device. The NAND Flash plane failure Patrol Read is repeated for a number of cycles on the NAND Flash plane in question.
Claims24
A method for verifying solid state memory, comprising the steps of:
- identifying, by a processing device, the number of data errors and locations of those errors within a solid state memory device;
- comparing, by said processing device, the number of errors at each one of said locations to a threshold value;
- and
- when the number of errors at one of said locations exceeds said threshold value, initiating a patrol read operation at said one of said locations
A method for verifying solid state memory, comprising the steps of:
- identifying, by a processing device, the number of data errors and locations of those errors within a NAND flash memory device;
- comparing, by said processing device, the number of errors at each one of said locations to a threshold value;
- and
- when the number of errors at one of said locations exceeds said threshold value, increasing the frequency of a patrol read operation at said one of said locations
A method for verifying solid state memory, comprising the steps of:
- monitoring, by a processing device, data error rates at a plurality of memory locations within a NAND flash memory device;
- comparing, by said processing device, the data error rates at each one of said locations to a threshold value;
- and
- when the data error rate at one of said locations exceeds said threshold value, initiating a patrol read operation at said one of said locations
A method for verifying solid state memory, comprising the steps of:
- monitoring, by a processing device, data error rates at a plurality of memory locations within a NAND flash memory device;
- comparing, by said processing device, the data error rates at each one of said locations to a threshold value;
- and
- when the data error rate at one of said locations exceeds said threshold value, increasing the frequency of a patrol read operation at said one of said locations
Dependencies are inferred from the claim text.