Processor for Executing Wide Operand Operations Using a Control Register and a Results Register

A processor comprising:

• a first data path having a first bit width;
• a second data path having a second bit width greater than the first bit width;
• a plurality of third data paths having a combined bit width less than the second bit width;
• a wide operand storage coupled to the first data path and to the second data path, the wide operand storage storing a wide operand having a size with a number of bits greater than the first bit width;
• a register file including registers having the first bit width, the register file being connected to the third data paths;
• a functional unit capable of performing operations in response to instructions, coupled by the second data path to the wide operand storage, and coupled by the third data paths to the register file;
• and
• wherein the processor executes an instruction containing instruction fields specifying (i) a control register in the register file storing a control operand, and (ii) a results register in the register file, the instruction causing the functional unit to perform an operation using the control operand and the wide operand, and place the results of that operation in the results register.