Processor simulation environment
AssigneeImperas Software Ltd.
InventorsJames Kenney, Simon Davidmann
Life of this patent
Estimating the term…
Loading patent…
AssigneeImperas Software Ltd.
InventorsJames Kenney, Simon Davidmann
Estimating the term…
In a method of simulating a processor system by running code that simulates the system on a host processor, code is translated at run time to a form required by the host processor. All instructions are mapped to a native instruction set of the host using two or more different code dictionaries: the translated instructions are mapped to multiple and different dictionaries dependent on the execution privilege level or mode of the simulated processor. If an instruction is encountered during runtime that changes the mode of the processor the code dictionary is switched to use the dictionary associated with the new mode. The different modes require different instruction mappings to the native instruction set of the host using different models that more accurately represent the behaviour of the system code and hardware in the system being simulated.
A method of simulating a processor system by running system code that simulates the system on a host processor, in which the system code has two or more execution privilege levels or modes and is translated at run time to a form required by the host processor;
Dependencies are inferred from the claim text.