Circuit for setting a plurality of blocks as an in-system programming area and a data buffer area and method therefore

A circuit for setting a plurality of blocks as an in-system programming area and a data buffer area, the circuit comprising:

• an in-system programming address decoding unit for generating a plurality of first decoding signals corresponding to the plurality of blocks according to a plurality of block address signals and a select signal;
• a data buffer address decoding unit for generating a plurality of second decoding signals corresponding to the plurality of blocks according to the plurality of block address signals and the select signal;
• and
• a block select unit comprising a plurality of select units, wherein each select unit corresponds to one block of the plurality of blocks, one first decoding signal of the plurality of first decoding signals, one select signal of a plurality of select signals, and one second decoding signal of the plurality of second decoding signals, and determines to output the first decoding signal or the second decoding signal to enable the block according to the select signal.