Integrated interfacing system and method for intelligent defect yield solutions

An integrated interfacing system for intelligent defect yield solutions, comprising:

• a web server, initiating a web interface for containing a plurality of functional items provided for clicking to activate one or more corresponding functionalities;
• a memory having computer-executable instructions for selectively performing the corresponding functionalities including:
• means for defect to layout coordinate conversion for acquiring layout coordinates of defects;
• means for dashboard summary serving to review information of categories of wafer lots;
• means for defect screening performing screening the defects based on layout pattern and defect size at an earlier stage;
• means for defect sampling performing sampling the defects based on layout pattern, equipment, mask and design weak spot;
• means for defect yield diagnosis identifying random particles, systematic defects, and defect classification;
• means for design-for-yield improving the wafer yield based on a systematic defect pattern library, design for manufacturing, layout base, and a frequent failure defect pattern library;
• means for yield prediction for determining cost for chip fabrication, estimating number of good die quantity delivery, and identifying a new design;
• means for pattern diagnosis performing pattern contour measurement in defect classification mode, layout pattern group mode, hot spot mode, and overlap multiple contour mode;
• means for data management for creating a report and performing data mining;
• and
• means for system administration for administrating operations of the web server including system configuration and user management.