Methods for three-dimensional integrated circuit through hole via gapfill and overburden removal

A method of processing a wafer having holes for through-hole vias for three-dimensional integrated circuits comprising:

• providing a process chamber for holding the wafer;
• providing a proximity head integrated with the process chamber, the proximity head being configured to accomplish wet chemical processing of the wafer;
• using the proximity head to electrochemically plate a gapfill metal layer to at least partially fill the holes on the wafer while holding the wafer in the process chamber;
• using the proximity head to electrochemically deplate a portion of the thickness of the overburden metal for the gapfill metal layer, and
• moving the wafer to a chemical mechanical planarization chamber before complete removal of the overburden metal and using chemical mechanical planarization to planarize the gapfill metal and to remove the remaining overburden metal.

A method of processing a wafer having holes for integrated circuits, the method being performed with an integrated system having:

• a process chamber for containing the wafer;
• a plating component integrated with the process chamber, the plating component being configured to electrochemically plate a gapfill metal layer onto the wafer to substantially fill the holes;
• and
• a deplating component integrated with the process chamber, the deplating component being configured to chemically or electrochemically remove a portion of overburden metal formed by the plating component;
• the method comprising performing multiple scans of the wafer with the plating component and the deplating component until the holes are substantially filled and the desired amount of thickness of the overburden metal is removed, wherein each scan adds a portion of the gapfill metal to fill the holes and each scan removes a portion of the thickness of the overburden metal.