Structure and method for reducing vertical crack propagation

A method of fabricating a semiconductor device, said method comprising:

• forming an insulator;
• forming a plurality of layers on said insulator, each of said layers including a dielectric insulator portion, a first metal conductor and a second metal conductor proximate said first metal conductor, and a nitride cap;
• forming a first vertically stacked metal structure by vertically aligning each of said first metal conductors of each of said layers with each other as said layers are successively formed on said insulator, and forming a second vertically stacked metal structure by vertically aligning each of said second metal conductors as said layers are successively formed on said insulator;
• and
• etching at least one air gap within said layers between said first vertically stacked metal structure and said second vertically stacked metal structure.

A method of fabricating a semiconductor device, said method comprising:

• forming an insulator;
• forming a plurality of vertically stacked insulator layers on said insulator in a process that includes embedding first metal conductors and second metal conductors in each of said stacked insulator layers to form a plurality of first vertically stacked metal layers and a plurality of second vertically stacked metal layers proximate said first vertically stacked layers;
• and
• forming at least one air gap in an inter-stack material of said vertically stacked insulator layers between a first side edge of said first vertically stacked metal layers and a second side edge of said second vertically stacked metal layers.