Trench silicide contact with low interface resistance
AssigneeInternational Business Machines Corporation
InventorsChengwen Pei, Jeffrey B. Johnson, Zhengwen Li, Jian Yu
Life of this patent
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Abstract
An electrical structure is provided that includes a dielectric layer present on a semiconductor substrate and a via opening present through the dielectric layer. An interconnect is present within the via opening. A metal semiconductor alloy contact is present in the semiconductor substrate. The metal semiconductor alloy contact has a perimeter defined by a convex curvature relative to a centerline of the via opening. The endpoints for the convex curvature that defines the metal semiconductor alloy contact are aligned to an interface between a sidewall of the via opening, a sidewall of the interconnect and an upper surface of the semiconductor substrate.
Claims20
A method of forming a semiconductor device comprising:
- forming a gate structure on a channel portion of a semiconductor substrate, wherein a source region and a drain region are present on opposing sides of the channel portion of the semiconductor substrate;
- forming a dielectric layer over the gate structure;
- forming a via opening through the dielectric layer to an exposed surface of the semiconductor substrate containing at least one of the source region and the drain region;
- forming an amorphous region in the semiconductor substrate by angled ion implantation through the via opening into the exposed surface of the semiconductor substrate;
- removing the amorphous region to form a divot having a convex curvature relative to the centerline of the via opening;
- forming a metal containing material on the divot;
- and
- converting the metal containing material and a portion of the semiconductor substrate adjacent to the divot into a metal semiconductor alloy contact that has a convex curvature that extends into the at least one of the source region and the drain region, wherein endpoints for the convex curvature that define the metal semiconductor alloy contact are aligned to an interface between a sidewall of the via opening and an upper surface of the semiconductor substrate;
- and forming an interconnect within the via opening in direct contact with the metal semiconductor alloy contact.
Dependencies are inferred from the claim text.