Current Writing Circuit for a Resistive Memory Cell Arrangement
AssigneeAgency for Science, Technology and Research
InventorsKejie Huang, Yan Hwee Sunny Lua, Khoon Siah Arthur Ang
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AssigneeAgency for Science, Technology and Research
InventorsKejie Huang, Yan Hwee Sunny Lua, Khoon Siah Arthur Ang
Estimating the term…
A current writing circuit for a resistive memory cell arrangement is provided. The current writing circuit comprises a first current source; a first reference potential terminal; a first switch configured to switch between the first current source and the first reference potential terminal during a write operation; a second current source; a second reference potential terminal; and a second switch configured to switch between the second reference potential terminal when the first switch is switched to the first current source, and the second current source when the first switch is switched to the first reference potential terminal, during the write operation, wherein the first current source and the second current source are of the same polarity. Further embodiments relate to a memory cell arrangement and a method of writing into a target resistive memory cell of a resistive memory cell arrangement.
A current writing circuit for a resistive memory cell arrangement, the resistive memory cell arrangement having a plurality of resistive memory cells, the current writing circuit comprising:
A memory cell arrangement, comprising:
A method of writing into a target resistive memory cell of a resistive memory cell arrangement, the method comprising:
An address decoder and memory controller for controlling a current writing circuit for writing into a target resistive memory cell of a resistive memory cell arrangement, wherein the current writing circuit comprises:
Dependencies are inferred from the claim text.