# US 2013/0159957 A1 · Method, structure, and design structure for a through-silicon-via wilkinson power divider

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- Number: US 2013/0159957 A1
- Document ID: US20130159957A1
- Status: Published application
- Kind: A1
- Application number: 13/763,136
- Filed: 2013-02-08
- Published: 2013-06-20
- Earliest claimed: 2009-08-26
- Assignees: International Business Machines Corporation
- Inventors: Hanyi DING; Alvin J. JOSEPH; Wayne H. WOODS, JR.
- Web page: https://patentgrep.com/patent/US20130159957A1

## CPC

- G06F 30/394: Routing (G06F30/396 takes precedence)
- H01P 5/16: Conjugate devices, i.e. devices having at least one port decoupled from one other port
- H01P 11/007: {Manufacturing frequency-selective devices (resonators H01P11/008)}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H01P: WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE (operating at optical frequencies G02B)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method, structure, and design structure for a through-silicon-via Wilkinson power divider. A method includes: forming an input on a first side of a substrate; forming a first leg comprising a first through-silicon-via formed in the substrate, wherein the first leg electrically connects the input and a first output; forming a second leg comprising a second through-silicon-via formed in the substrate, wherein the second leg electrically connects the input and a second output, and forming a resistor electrically connected between the first output and the second output.

## Claims

### Claim 1

A design structure tangibly embodied in a machine readable medium for designing, manufacturing, or testing an integrated circuit, the design structure comprising:
an input in a first layer on a substrate;
a first output and a second output in a second layer on the substrate;
a first leg comprising a first through-silicon via extending through the substrate and electrically connected between the input and the first output;
a second leg comprising a second through-silicon via extending through the substrate and electrically connected between the input and the second output; and
a resistor electrically connected between the first output and the second output.

### Claim 2 (depends on 1)

The design structure of claim 1, wherein the design structure comprises a netlist.

### Claim 3 (depends on 1)

The design structure of claim 1, wherein the design structure resides on storage medium as a data format used for the exchange of layout data of integrated circuits.

### Claim 4 (depends on 1)

The design structure of claim 1, wherein the design structure resides in a programmable gate array.

### Claim 5 (depends on 1)

The design structure of claim 1, wherein
the first layer is on a first side of the substrate, and
the second layer is on a second side of the substrate different from the first side.

### Claim 6 (depends on 5)

The design structure of claim 5, further comprising at least one ground through-silicon via extending through the substrate between the first through-silicon via and the second through-silicon via.

### Claim 7 (depends on 6)

The design structure of claim 6, further comprising at least one insulator-filled through-silicon-via in the substrate between the at least one ground through-silicon-via and at least one of the first through-silicon-via and the second through-silicon-via.

### Claim 8 (depends on 1)

The design structure of claim 1, wherein the input, the first leg, the second leg, the resistor, the first output, and the second output collectively constitute a Wilkinson power divider.

### Claim 9

A design structure comprising instructions tangibly embodied in a machine readable storage medium for designing, manufacturing, or simulating an integrated circuit, the instructions when executed on a data processing system generate a functional representation of the integrated circuit, design structure comprising:
an input on a first side of a substrate;
a first leg comprising a first through-silicon-via in the substrate, wherein the first leg electrically connects the input and a first output;
a second leg comprising a second through-silicon-via in the substrate, wherein the second leg electrically connects the input and a second output; and
a resistor electrically connected between the first output and the second output,
wherein the first leg and the second leg are split from the input at a common node, which is connected to the input.

### Claim 10 (depends on 9)

The design structure of claim 9, wherein:
the first through-silicon-via and the second through-silicon-via extend substantially
vertically through the substrate, and
the first leg, the second leg, and the resistor comprise a predetermined characteristic impedance at the input, the first output, and the second output.

### Claim 11 (depends on 9)

The design structure of claim 9, further comprising the first output and the second output are in another layer of dielectric material on a second side of the substrate opposite the first side of the substrate.