# US 2013/0159611 A1 · Systems and methods for providing load isolation in a solid-state device

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- Number: US 2013/0159611 A1
- Document ID: US20130159611A1
- Status: Published application
- Kind: A1
- Application number: 13/762,524
- Filed: 2013-02-08
- Published: 2013-06-20
- Earliest claimed: 2011-03-04
- Assignees: STEC, Inc.
- Inventors: Omid NASIBY; Stephen R. BOORMAN; Irfan SYED
- Web page: https://patentgrep.com/patent/US20130159611A1

## CPC

- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 13/385: {for adaptation of a particular data processing system to different peripheral devices}
- G06F 3/0658: {Controller construction arrangements}
- G06F 2212/7203: Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
- G06F 2213/3802: Harddisk connected to a computer port
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

Systems for automatically calibrating a storage memory controller are disclosed. In some embodiments, the systems may be realized as a solid state device system with an electro-static discharge (ESD) protection capability. The system can include a memory controller electrically coupled to a channel, where the memory controller is configured to select at least one of a plurality of flash memory devices. The system can also include at least one isolation device including an ESD protection circuit, configured to electrically couple the channel to the at least one of the plurality of flash memory devices and to decouple the channel from the remaining of the plurality of flash memory devices.

## Claims

### Claim 1

A solid state device system with an electro-static discharge (ESD) protection capability, the system comprising:
a memory controller electrically coupled to a channel, wherein the memory controller is configured to select at least one of a plurality of flash memory devices; and
at least one isolation device comprising an ESD protection circuit, configured to electrically couple the channel to the at least one of the plurality of flash memory devices and to decouple the channel from the remaining of the plurality of flash memory devices.

### Claim 2 (depends on 1)

The solid state device system of claim 1, wherein the ESD protection circuit comprises a clamping diode configured to clamp a positive ESD pulse to a positive power supply.

### Claim 3 (depends on 1)

The solid state device system of claim 1, wherein the ESD protection circuit comprises a clamping diode configured to clamp a negative ESD pulse to ground.

### Claim 4 (depends on 1)

The solid state device system of claim 1, wherein the at least one isolation device is arranged in a tree topology.

### Claim 5 (depends on 4)

The solid state device system of claim 4, wherein the tree topology comprises a binary tree topology.

### Claim 6 (depends on 1)

The solid state device system of claim 1, wherein the memory controller is configured to send a control signal to the at least one isolation device to cause the at least one isolation device to couple the channel to the at least one of the plurality of flash memory devices and to decouple the channel from the remaining of the plurality of flash memory devices.

### Claim 7 (depends on 1)

The solid state device system of claim 1, wherein the memory controller is configured to send an output enable signal,
wherein if the output enable signal is in a first state, the at least one isolation device is configured to decouple each of the plurality of flash memory devices from the channel, and
wherein if the output enable signal is in a second state, the at least one isolation device is configured to couple at least one of the plurality of flash memory devices to the channel.

### Claim 8 (depends on 7)

The flash memory system of claim 7, wherein the at least one isolation device is configured to decouple each of the plurality of flash memory devices from the memory controller by decoupling itself from a power supply.

### Claim 9

A flash memory system with an electro-static discharge (ESD) protection capability, the system comprising:
a plurality of flash memory devices; and
a multiplexing device comprising an ESD protection circuit, configured to electrically couple one of the plurality of flash memory devices to a channel and to decouple the remaining of the plurality of flash memory devices from the channel.

### Claim 10 (depends on 9)

The flash memory system of claim 9, wherein the ESD protection circuit comprises a clamping diode configured to clamp a positive ESD pulse to a positive power supply.

### Claim 11 (depends on 9)

The flash memory system of claim 9, wherein the ESD protection circuit comprises a clamping diode configured to clamp a negative ESD pulse to ground.

### Claim 12 (depends on 9)

The flash memory system of claim 9, wherein the multiplexing device is configured to receive an output enable signal,
wherein if the output enable signal is in a first state, the multiplexing device is configured to decouple each of the plurality of flash memory devices from the channel, and
wherein if the output enable signal is in a second state, the multiplexing device is configured to couple at least one of the plurality of flash memory devices to the channel.

### Claim 13 (depends on 12)

The flash memory system of claim 12, wherein the multiplexing device is configured to decouple each of the plurality of flash memory devices from the memory controller by decoupling itself from a power supply.

### Claim 14 (depends on 9)

The flash memory system of claim 9, wherein the multiplexing device comprises at least one isolation device arranged in a tree topology.

### Claim 15

An electrical board, with an electro-static discharge (ESD) protection capability, for a solid state device system, comprising:
a plurality of electrical channels, configured to be coupled to one or more flash memory devices; and
a plurality of isolation devices comprising an ESD protection circuit, wherein each of the plurality of isolation devices is disposed between at least two of the plurality of electrical channels, further wherein the plurality of isolation devices is configured to electrically couple one of the flash memory devices to an output port and to decouple the remaining of the flash memory devices from the output port.

### Claim 16 (depends on 15)

The electrical board of claim 15, wherein the ESD protection circuit comprises a clamping diode configured to clamp a positive ESD pulse to a positive power supply.

### Claim 17 (depends on 15)

The electrical board of claim 15, wherein the ESD protection circuit comprises a clamping diode configured to clamp a negative ESD pulse to ground.

### Claim 18 (depends on 15)

The electrical board of claim 15, further comprising a memory controller electrically coupled to the output port, wherein the memory controller is further configured to provide a control signal to the plurality of isolation devices to cause the plurality of isolation devices to couple the one of the flash memory devices to the output port and to decouple the remaining of the flash memory devices from the output port.

### Claim 19 (depends on 15)

The electrical board of claim 15, wherein the memory controller is further configured to provide an output enable signal,
wherein if the output enable signal is in a first state, the plurality of isolation devices is configured to decouple each of the flash memory devices from the output port, and
wherein if the output enable signal is in a second state, the plurality of isolation devices is configured to couple at least one of the flash memory devices to the output port.

### Claim 20 (depends on 15)

The electrical board of claim 15, wherein the plurality of isolation devices are arranged in a tree topology.
