# US 2013/0159607 A1 · Memory system and a programming method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0159607 A1 - Document ID: US20130159607A1 - Status: Published application - Kind: A1 - Application number: 13/535,934 - Filed: 2012-06-28 - Published: 2013-06-20 - Earliest claimed: 2011-12-19 - Assignees: Samsung Electronics Co., Ltd. - Inventors: Yoon-Young Kyung; Nam-Ho Kim; Hyun Jin Choi - Web page: https://patentgrep.com/patent/US20130159607A1 ## CPC - G11C 16/3404: {Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells} - G06F 12/0246: {in block erasable memory, e.g. flash memory} - G11C 5/147: {Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence)} - G11C 7/04: with means for avoiding disturbances due to temperature effects - G11C 11/5628: {Programming or writing circuits; Data input circuits} - G11C 16/0483: {comprising cells having several storage transistors connected in series} - G11C 16/10: Programming or data input circuits - G11C 29/028: {with adaption or trimming of parameters} - G11C: STATIC STORES (semiconductor memory devices H10B) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A method of programming a storage device includes determining, at a controller of the storage device, that a first program mode of a plurality of program modes is to be entered in response to first information, wherein the first information includes a parameter associated with temperature, power consumption or input/output workload, and changing, using the controller, a program ratio of a first programming and a second programming of the storage device in the first program mode. ## Claims ### Claim 1 A method of programming a storage device, comprising: determining, at a controller of the storage device, that a first program mode of a plurality of program modes is to be entered in response to first information, wherein the first information includes a parameter associated with temperature, power consumption or input/output workload; and changing, using the controller, a program ratio of a first programming and a second programming of the storage device in the first program mode. ### Claim 2 (depends on 1) The method of claim 1, wherein the program ratio of the first and second programmings is non-uniform in the first mode. ### Claim 3 (depends on 2) The method of claim 2, wherein the program ratio of the first and second programmings is uniform in a second mode of the plurality of program modes. ### Claim 4 (depends on 1) The method of claim 1, wherein the first programming is performed more times than the second programming. ### Claim 5 (depends on 1) The method of claim 1, wherein the first programming consumes less power or generates less heat than the second programming. ### Claim 6 (depends on 1) The method of claim 1, wherein the storage device includes a 2-bit cell. ### Claim 7 (depends on 6) The method of claim 6, wherein the first programming is a least significant bit (LSB) program operation on the 2-bit cell and the second programming is a most significant bit (MSB) program operation on the 2-bit cell. ### Claim 8 A method of programming a storage device, comprising: determining, at a controller of the storage device, that a first program mode of a plurality of program modes is to be entered in response to first information, wherein the first information includes a parameter associated with temperature, power consumption or input/output workload; and changing, using the controller, a program ratio of a first programming, a second programming and a third programming of the storage device in the first program mode. ### Claim 9 (depends on 8) The method of claim 8, wherein the program ratio is changed such that the first programming is performed more times than each of the second and third programmings, and wherein the second and third programmings are performed the same number of times. ### Claim 10 (depends on 8) The method of claim 8, wherein the program ratio is changed such that the first and second programmings are each performed more times than the third programming, and wherein the first and second programmings are performed the same number of times. ### Claim 11 (depends on 8) The method of claim 8, wherein the program ratio is changed such that the first to third programmings are performed a different number of times from each other. ### Claim 12 (depends on 8) The method of claim 8, wherein the storage device includes a 3-bit cell. ### Claim 13 (depends on 12) The method of claim 12, wherein the first programming is a least significant bit (LSB) program operation on the 3-bit cell, the second programming is a center significant bit (CSB) program operation on the 3-bit cell and the third programming is a most significant bit (MSB) program operation on the 3-bit cell. ### Claim 14 (canceled) ### Claim 15 A method of programming a storage device, comprising: determining, at a controller of the storage device, that an operating mode of the storage device is a low power mode; determining, at the controller when in the low power mode, that a first program mode of a plurality of program modes is not executable, due to deterioration in performance of the storage device; invoking a power reduction scheme in response to the determination that the first program mode is not executable; and performing first and second programmings in the storage device in a second program mode of the plurality of program modes, in accordance with the power reduction scheme. ### Claim 16 (depends on 15) The method of claim 15, wherein a program ratio of the first and second programmings is uniform in the second program mode and the program ratio of the first and second programmings is not uniform in the first program mode. ### Claim 17 (canceled) ### Claim 18 A memory system, comprising: a plurality of nonvolatile memory devices, wherein each of the nonvolatile memory devices is configured to operate in a first program mode and a second program mode; and a controller connected to the nonvolatile memory devices via a plurality of channels, wherein the controller is configured to measure a temperature of the memory system and determine, in response to the measured temperature, whether to operate the nonvolatile memory devices in the first program mode or the second program mode. ### Claim 19 (depends on 18) The memory system of claim 18, wherein in the first program mode a program ratio of first and second programmings is greater than 1:1 and in the second program mode a program ratio of the first and second programmings is 1:1. ### Claim 20 (depends on 18) The memory system of claim 18, wherein each channel includes a plurality of ways, each way including one of the nonvolatile memory devices connected to the channel. ### Claim 21 (depends on 18) The memory system of claim 18, wherein the memory system is included in a solid state drive. ### Claim at position 22 22-28. (canceled)