# US 2013/0159601 A1 · Controller and Method for Virtual LUN Assignment for Improved Memory Bank Mapping

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- Number: US 2013/0159601 A1
- Document ID: US20130159601A1
- Status: Published application
- Kind: A1
- Application number: 13/330,975
- Filed: 2011-12-20
- Published: 2013-06-20
- Earliest claimed: 2011-12-20
- Assignees: SanDisk Technologies LLC
- Inventors: Paul A. Lassa; Alan W. Sinclair
- Web page: https://patentgrep.com/patent/US20130159601A1

## CPC

- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 3/0613: {in relation to throughput}
- G06F 3/064: {Management of blocks}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G11C 29/883: {using a single defective memory device with reduced capacity, e.g. half capacity}
- G06F 2212/1016: Performance improvement
- G06F 2212/7208: Multiple device management, e.g. distributing data over multiple flash devices
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A controller communicates with a plurality of multi-chip memory packages. Each multi-chip memory package comprises a plurality of memory dies, each having a respective plurality of memory blocks, some of which are good and some of which are bad. The controller determines a number of good blocks in each memory die. Based on the determined number of good blocks in each memory die, the controller selects a memory die from each of the multi-chip memory packages to access in parallel, wherein the selected memory dies are not necessarily all in the same relative position in each multi-chip package. The controller then creates a metablock from a set of good blocks from each of the selected memory dies, wherein a maximum number of metablocks that can be created across the selected memory dies is determined by a lowest number of good blocks in the selected memory dies.

## Claims

### Claim 1

A controller comprising:
one or more interfaces through which to communicate with a plurality of multi-chip memory packages, wherein each multi-chip memory package comprises a plurality of memory dies, and wherein each memory die has a respective plurality of memory blocks, some of which are good blocks and some of which are bad blocks; and
a processor in communication with the one or more interfaces, wherein the processor is configured to:
determine a number of good blocks in each memory die in each of the multi-chip memory packages;
based on the determined number of good blocks in each memory die, select a memory die from each of the multi-chip memory packages to access in parallel, wherein the selected memory dies are not necessarily all in the same relative position in each multi-chip package; and
create a metablock from a set of good blocks from each of the selected memory dies, wherein a maximum number of metablocks that can be created across the selected memory dies is determined by a lowest number of good blocks in the selected memory dies.

### Claim 2 (depends on 1)

The controller of claim 1, wherein the selecting and creating acts are performed for N instances of storage management software running on the controller, wherein N is the number of memory dies on each multi-chip package, and wherein different memory dies are selected in each instance.

### Claim 3 (depends on 2)

The controller of claim 2, wherein the memory dies are selected to uniformly spread good blocks across all the instances.

### Claim 4 (depends on 2)

The controller of claim 2, wherein the memory dies are selected to allocated the greatest number of good blocks together in a single instance.

### Claim 5 (depends on 2)

The controller of claim 2, wherein the processor is further configured to prioritize traffic to the instances according to a service level.

### Claim 6 (depends on 2)

The controller of claim 2, wherein the processor is further configured to prioritize traffic to the instances according to a traffic type.

### Claim 7 (depends on 1)

The controller of claim 1, wherein the controller is part of a solid-state drive.

### Claim 8 (depends on 1)

The controller of claim 1, wherein the controller is in communication with each multi-chip memory package using a different Open NAND Flash Interface (ONFI) channel.

### Claim 9 (depends on 8)

The controller of claim 8, wherein each ONFI channel supports a plurality of multi-chip memory packages.

### Claim 10 (depends on 1)

The controller of claim 1, wherein good blocks that are not allocated to a metablock are reserved as spare blocks for bad block remapping.

### Claim 11

A method for creating a metablock across multi-chip memory packages, the method comprising:
performing in a controller comprising one or more interfaces through which to communicate with a plurality of multi-chip memory packages, wherein each multi-chip memory package comprises a plurality of memory dies, and wherein each memory die has a respective plurality of memory blocks, some of which are good blocks and some of which are bad blocks:
determine a number of good blocks in each memory die in each of the multi-chip memory packages;
based on the determined number of good blocks in each memory die, select a memory die from each of the multi-chip memory packages to access in parallel, wherein the selected memory dies are not necessarily all in the same relative position in each multi-chip package; and
create a metablock from a set of good blocks from each of the selected memory dies, wherein a maximum number of metablocks that can be created across the selected memory dies is determined by a lowest number of good blocks in the selected memory dies.

### Claim 12 (depends on 11)

The method of claim 11, wherein the selecting and creating acts are performed for N instances of storage management software running on the controller, wherein N is the number of memory dies on each multi-chip package, and wherein different memory dies are selected in each instance.

### Claim 13 (depends on 12)

The method of claim 12, wherein the memory dies are selected to uniformly spread good blocks across all the instances.

### Claim 14 (depends on 12)

The method of claim 12, wherein the memory dies are selected to allocated the greatest number of good blocks together in a single instance.

### Claim 15 (depends on 12)

The method of claim 12 further comprising prioritizing traffic to the instances according to a service level.

### Claim 16 (depends on 12)

The method of claim 12 further comprising prioritizing traffic to the instances according to a traffic type.

### Claim 17 (depends on 11)

The method of claim 11, wherein the controller is part of a solid-state drive.

### Claim 18 (depends on 11)

The method of claim 11, wherein the controller is in communication with each multi-chip memory package using a different Open NAND Flash Interface (ONFI) channel.

### Claim 19 (depends on 18)

The method of claim 18, wherein each ONFI channel supports a plurality of multi-chip memory packages.

### Claim 20 (depends on 11)

The method of claim 11, wherein good blocks that are not allocated to a metablock are reserved as spare blocks for bad block remapping.
