# US 2013/0157386 A1 · Semiconductor apparatus and repairing method thereof

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- Number: US 2013/0157386 A1
- Document ID: US20130157386A1
- Status: Published application
- Kind: A1
- Application number: 13/760,342
- Filed: 2013-02-06
- Published: 2013-06-20
- Earliest claimed: 2010-03-29
- Assignees: SK hynix Inc.
- Inventors: Tae Sik YUN; Won Woong SEOK
- Web page: https://patentgrep.com/patent/US20130157386A1

## CPC

- H10P 74/207: {Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics}
- G01R 31/318513: {Test of Multi-Chip-Moduls}
- H10P 74/232: {comprising connection or disconnection of parts of a device in response to a measurement}
- Y10T 29/49004: including measuring or testing of device or component part
- Y10T 29/53022: with means to test work or product
- Y10T 29/53174: Means to fasten electrical component to wiring board, base, or substrate
- Y10T 29/53265: with work-holder for assembly
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

A semiconductor apparatus includes a semiconductor chip through-line for transmitting signals commonly to a plurality of stacked semiconductor chips. The apparatus includes a first test pulse signal transmission unit configured to transmit a first test pulse signal to a first end of the semiconductor chip through-line when a power-up operation is performed; a second test pulse signal transmission unit configured to transmit a second test pulse signal to a second end of the semiconductor chip through-line after the first test pulse signal is transmitted; a first signal reception unit coupled to the first end of the semiconductor chip through-line, and configured to receive signals transmitted from the first and second test pulse signal transmission units; and a second signal reception unit coupled to the second end of the semiconductor chip through-line, and configured to receive the signals transmitted by the first and second test pulse signal transmission units.

## Claims

### Claim 1

A method for repairing a semiconductor apparatus for transmitting signals commonly to a plurality of stacked semiconductor chips, the method comprising the steps of:
transmitting a first test pulse signal to first ends of semiconductor chip through-lines in response to a power-up signal;
receiving the first test pulse signal through first and second signal reception units, which are coupled to first and second ends of the semiconductor chip through-lines;
transmitting a second test pulse signal to the second ends of the semiconductor chip through-lines;
receiving the second test pulse signal through the first and second signal reception units, which are coupled to the first and second ends of the semiconductor chip through-lines; and
repairing the semiconductor chip through-lines based on the first and second test pulse signals received by the first and second signal reception units.

### Claim 2 (depends on 1)

The method according to claim 1, wherein the second test pulse signal is transmitted to the second ends of the semiconductor chip through-lines after the first test pulse signal is transmitted to the first ends of the semiconductor chip through-lines.

### Claim 3 (depends on 1)

The method according to claim 1, wherein the second test pulse signal is transmitted to the second ends of the semiconductor chip through-lines when the first test pulse signal transmitted through the first ends of the semiconductor chip through-lines is received at a predetermined level.