# US 2013/0156232 A1 · Amplifying circuit capable of suppressing spikes of an audio signal

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2013/0156232 A1
- Document ID: US20130156232A1
- Status: Published application
- Kind: A1
- Application number: 13/671,524
- Filed: 2012-11-07
- Published: 2013-06-20
- Earliest claimed: 2011-12-15
- Assignees: Princeton Technology Corporation
- Inventors: Yung-Ming Lee; Ming-Chung Li
- Web page: https://patentgrep.com/patent/US20130156232A1

## CPC

- H03F 1/342: {in field-effect transistor amplifiers}
- H03F 3/2171: {with field-effect devices (H03F3/2173 - H03F3/2178 take precedence)}
- H03F 1/523: {for amplifiers using field-effect devices (H03F1/526 takes precedence)}
- H03F 3/217: Class D power amplifiers; Switching amplifiers
- H03F 3/38: DC amplifiers with modulator at input and demodulator at output; Modulators or demodulators specially adapted for use in such amplifiers {(switched capacitor amplifiers H03F3/005)}
- H03F: AMPLIFIERS

## Abstract

An amplifying circuit capable of suppressing spikes of an audio signal includes an integration module, a comparison module, an output module, a feedback module, and a limiting module. The integration module is used for receiving an input signal and generating a first voltage signal corresponding to the input signal. The comparison module is coupled to the integration module for receiving the first voltage signal and a reference signal, and generating a comparison signal. The output module is coupled to the comparison module for generating an audio signal according to the comparison signal. The feedback module is coupled between the output module and the integration module for feeding back an output signal to the integration module. The limiting module is coupled between the feedback module and the integration module for limiting the comparison signal to be within a predetermined range.

## Claims

### Claim 1

An amplifying circuit capable of suppressing spikes of an audio signal, the amplifying circuit comprising:
an integration module for receiving an input signal, and generating a first voltage signal corresponding to the input signal;
a comparison module coupled to the integration module for receiving the first voltage signal and a reference signal, and generating a comparison signal;
an output module coupled to the comparison module for generating the audio signal according to the comparison signal;
a feedback module coupled between the output module and the integration module for feeding back an output signal to the integration module; and
a limiting module coupled between the integration module and the feedback module for limiting the comparison signal to be within a predetermined range.

### Claim 2 (depends on 1)

The amplifying circuit of claim 1,
wherein the integration module comprises:
an integrator, a first terminal of the integrator for receiving the input signal, a second terminal of the integrator for receiving a feedback voltage generated by the feedback module, a third terminal of the integrator for outputting the first voltage signal corresponding to the input signal, and a fourth terminal of the integrator coupled to ground, wherein the reference signal is a triangular wave signal generated by a triangular wave generator; and
the comparison module comprises:
a comparator, a first input terminal of the comparator coupled to the third terminal of the integrator, a second input terminal of the comparator coupled to the triangular wave generator, and an output terminal of the comparator for outputting the comparison signal, wherein the comparator compares the first voltage signal with the triangular wave signal to output the comparison signal.

### Claim 3 (depends on 1)

The amplifying circuit of claim 1, wherein the output module comprises:
a gate driver for generating a first output signal and a second output signal according to the comparison signal, wherein a first input terminal of the gate driver coupled to the output terminal of the comparator is used for receiving the comparison signal, a first output terminal of the gate driver is used for outputting the first output signal, and a second output terminal of the gate driver is used for outputting the second output signal;
an output stage circuit, wherein a first input terminal of the output stage circuit is coupled to the first output terminal of the gate driver, a second input terminal of the output stage circuit is coupled to the second output terminal of the gate driver, and an output terminal of the output stage circuit is coupled to the feedback module for outputting the output signal; and
a low-pass filter coupled to the output stage circuit for converting and filtering the output signal into the audio signal.

### Claim 4 (depends on 1)

The amplifying circuit of claim 1, wherein the limiting module comprises:
a voltage detection circuit coupled to the integration module, wherein a first input terminal of the voltage detection circuit is used for receiving a high voltage reference signal, a second input terminal of the voltage detection circuit is used for receiving a low voltage reference signal, a third input terminal of the voltage detection circuit is used for receiving the first voltage signal, a first output terminal of the voltage detection circuit is used for sinking a discharge current, and a second output terminal of the voltage detection circuit is used for outputting a charge current; and
a current mirror circuit, a first terminal of the current mirror circuit coupled to the first output terminal of the voltage detection circuit, a second terminal of the current mirror circuit coupled to the second output terminal of the voltage detection circuit, and an output terminal of the current mirror circuit coupled to the feedback module.

### Claim 5 (depends on 4)

The amplifying circuit of claim 4, wherein the voltage detection circuit comprises:
an N-type metal-oxide-semiconductor transistor having a first terminal coupled to the discharge current, a second terminal coupled to the low voltage reference signal, and a third terminal coupled to the first voltage signal; and
a P-type metal-oxide-semiconductor transistor having a first terminal coupled to the first voltage signal, a second terminal coupled to the high voltage reference signal, and a third terminal coupled to the charge current.

### Claim 6 (depends on 5)

The amplifying circuit of claim 5, wherein the current mirror circuit comprises:
a first P-type metal-oxide-semiconductor transistor having a first terminal for receiving a second voltage, a second terminal coupled to the first terminal of the N-type metal-oxide-semiconductor transistor, and a third terminal coupled to the second terminal of the first P-type metal-oxide-semiconductor transistor;
a second P-type metal-oxide-semiconductor transistor having a first terminal for receiving the second voltage, a second terminal coupled to the second terminal of the first P-type metal-oxide-semiconductor transistor, and a third terminal;
a third P-type metal-oxide-semiconductor transistor having a first terminal for receiving the second voltage, a second terminal, and a third terminal coupled to the second terminal of the third P-type metal-oxide-semiconductor transistor;
a fourth P-type metal-oxide-semiconductor transistor having a first terminal for receiving the second voltage, a second terminal coupled to the second terminal of the third P-type metal-oxide-semiconductor transistor, and a third terminal coupled to the feedback module;
a third N-type metal-oxide-semiconductor transistor having a first terminal coupled to the charge current, a second terminal coupled to the first terminal of the third N-type metal-oxide-semiconductor transistor, and a third terminal coupled to the ground;
a fourth N-type metal-oxide-semiconductor transistor having a first terminal coupled to the third terminal of the third P-type metal-oxide-semiconductor transistor, a second terminal coupled to the second terminal of the third N-type metal-oxide-semiconductor transistor, and a third terminal coupled to the ground;
a fifth N-type metal-oxide-semiconductor transistor having a first terminal coupled to the third terminal of the second P-type metal-oxide-semiconductor transistor, a second terminal coupled to the first terminal of the fifth N-type metal-oxide-semiconductor transistor, and a third terminal coupled to the ground; and
a sixth N-type metal-oxide-semiconductor transistor having a first terminal coupled to the feedback module, a second terminal coupled to the second terminal of the fifth N-type metal-oxide-semiconductor transistor, and a third terminal coupled to the ground.

### Claim 7 (depends on 4)

The amplifying circuit of claim 4, wherein the voltage detection circuit comprises:
a first N-type metal-oxide-semiconductor transistor having a first terminal coupled to the discharge current, a second terminal coupled to the low voltage reference signal, and a third terminal coupled to the first voltage signal; and
a second N-type metal-oxide-semiconductor transistor having a first terminal coupled to the charge current, a second terminal coupled to the first voltage signal, and a third terminal coupled to the high voltage reference signal.

### Claim 8 (depends on 7)

The amplifying circuit of claim 7, wherein the current mirror circuit comprises:
a first P-type metal-oxide-semiconductor transistor having a first terminal for receiving a second voltage, a second terminal coupled to the first terminal of the first N-type metal-oxide-semiconductor transistor, and a third terminal coupled to the second terminal of the first P-type metal-oxide-semiconductor transistor;
a second P-type metal-oxide-semiconductor transistor having a first terminal for receiving the second voltage, a second terminal coupled to the second terminal of the first P-type metal-oxide-semiconductor transistor, and a third terminal;
a third P-type metal-oxide-semiconductor transistor having a first terminal for receiving the second voltage, a second terminal, and a third terminal coupled to the second terminal of the third P-type metal-oxide-semiconductor transistor and the first terminal of the second N-type metal-oxide-semiconductor transistor;
a fourth P-type metal-oxide-semiconductor transistor having a first terminal for receiving the second voltage, a second terminal coupled to the second terminal of the third P-type metal-oxide-semiconductor transistor, and a third terminal coupled to the feedback module;
a third N-type metal-oxide-semiconductor transistor having a first terminal coupled to the third terminal of the second P-type metal-oxide-semiconductor transistor, a second terminal coupled to the first terminal of the third N-type metal-oxide-semiconductor transistor, and a third terminal coupled to the ground; and
a fourth N-type metal-oxide-semiconductor transistor having a first terminal coupled to the third terminal of the fourth P-type metal-oxide-semiconductor transistor, a second terminal coupled to the second terminal of the third N-type metal-oxide-semiconductor transistor, and a third terminal coupled to the ground.

### Claim 9 (depends on 1)

The amplifying circuit of claim 1, wherein the output signal is a pulse width modulation voltage.

### Claim 10 (depends on 1)

The amplifying circuit of claim 1, wherein the comparison signal is a pulse width modulation voltage.
