# US 2013/0156031 A1 · Communication apparatus and communication method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0156031 A1 - Document ID: US20130156031A1 - Status: Published application - Kind: A1 - Application number: 13/665,154 - Filed: 2012-10-31 - Published: 2013-06-20 - Earliest claimed: 2011-12-19 - Assignees: Fujitsu Limited - Inventors: Yasuyuki Mitsumori - Web page: https://patentgrep.com/patent/US20130156031A1 ## CPC - H04L 12/4625: {Single bridge functionality, e.g. connection of two networks over a single bridge} - H04L 12/4641: {Virtual LANs, VLANs, e.g. virtual private networks [VPN] (LAN interconnection over a bridge based backbone H04L12/462; encapsulation techniques H04L12/4633; routing of packets H04L45/00; packet switches H04L49/00; virtual private networks for security H04L63/0272)} - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A communication apparatus includes a plurality of interface circuits, each interface circuit including a first processor, a plurality of ports, and a first memory configured to store, in each group composed of port of one or more, identification information for the group and identification information for the port belonging to the group, and a switch circuit including, a second processor, a second memory configured to store, in the each group, the identification information for the group and identification information for the interface circuit having port belonging to the group, and a bridge circuit configured to transmit data to the interface circuit. ## Claims ### Claim 1 A communication apparatus comprising: a plurality of interface circuits, each interface circuit including: a first processor; a plurality of ports; and a first memory configured to store, in each group composed of port of one or more, identification information for the group and identification information for the port belonging to the group; and a switch circuit including: a second processor; a second memory configured to store, in the each group, the identification information for the group and identification information for the interface circuit having port belonging to the group; and a bridge circuit configured to transmit data to the interface circuit, wherein the second processor is configured to execute a procedure including: acquiring, from the second memory, the identification information for the interface circuit associated with the identification information for the group indicated by data received from the interface circuit; and generating data by copying the data received from the interface circuit and by addressing to the interface circuit having identification information matching to the acquired identification information for interface circuit, and wherein the first processor is configured to execute a procedure including: adding, to the data received on the port, source information including the identification information for the interface circuit including the port on which the data has been received and the identification information for the port on which the data has been received; acquiring, from the first memory, the identification information for the port associated with the identification information for the group indicated by the data received from the switch circuit; generating data by copying the data received from the switch circuit and by addressing to the port having identification information matching to the acquired identification information for the port; determining whether or not there is a port that matches the source information added to the data received from the switch circuit; deterring the generation of the data by copying the data received from the switch circuit and by addressing to the port having identification information matching to the acquired identification information for the port, when there is the port that matches the source information; and transmitting the data generated by copying the data received from the switch circuit from the port to which the data has been addressed. ### Claim 2 (depends on 1) The communication apparatus according to claim 1, wherein the procedure executed by the first processor further includes: retrieving, from the first memory, the identification information for the group indicated by the data received from the switch circuit and the identification information for the port of one or more belonging to the group having the retrieved identification information for the group, determining whether or not the identification information for the interface circuit added to the data received from the switch circuit matches the identification information for the interface circuit including the port on which the data has been received, and generating data by copying the data received from the switch circuit and by addressing to the ports retrieved from the first memory, excepting the port that matches the source information, when the identification information for the interface circuit added to the data matches the identification information for the interface circuit including the port on which the data has been received. ### Claim 3 (depends on 1) The communication apparatus according to claim 1, wherein the procedure executed by the second processor further includes: when the switch circuit receives the data indicating the identification information for the group from the interface circuit that has one port belonging to the group having the identification information for the group indicated by the data received from the switch circuit, deterring the generation of the data by copying the data received from the interface circuit and by addressing to the interface circuit having the one port. ### Claim 4 (depends on 3) The communication apparatus according to claim 3, wherein the procedure executed by the first processor further includes: adding copy deterrence information to the data received on the port, when the port on which the data has been received is one port in the interface circuit that belongs to the group having the identification information for the group indicated by that data, and wherein the procedure executed by the second processor further includes: deterring the generation of the data by copying the data addressed to the interface circuit having the one port, when the copy deterrence information is added to the data received from the interface circuit. ### Claim 5 (depends on 4) The communication apparatus according to claim 4, wherein the procedure executed by the second processor further including: retrieving, from the second memory, the identification information for the interface circuit having the port belonging to the group having the identification information for the group indicated by the data received from the interface circuit, and generating data by copying the data received from the interface circuit and by addressing to the interface circuit retrieved from the second memory, excepting the interface circuit having the identification information that matches the identification information for the interface circuit added to the data received from the interface circuit, when the copy deterrence information is added to the data received from the interface circuit. ### Claim 6 (depends on 1) The communication apparatus according to claim 1, the switch circuit further including: a third memory configured to store destination information that includes identification information for a terminal to which data is transferred, identification information for the port coupled with the terminal, and identification information for the interface circuit having the port of one or more, and the procedure executed by the second processor further includes: acquiring, from the third memory, the identification information for the port and the identification information for the interface circuit associated with the identification information for the terminal included in the data received from the interface circuit, and discarding the data received from the interface circuit, when the identification information for the interface circuit indicated by the data received from the interface circuit and the identification information for the port in the source information added to the data received from the interface circuit match the identification information for the interface circuit and the identification information for the port acquired from the third memory, respectively. ### Claim 7 A communication apparatus comprising: a plurality of interface circuits, each interface circuit including: a plurality of ports; a first memory configured to store, in each group composed of port of one or more, identification information for the group and identification information for the port belonging to the group; and a switch circuit including: a second memory configured to store, in the each group, the identification information for the group and the identification information for the interface circuit having port belonging to the group; a second copy circuit configured to acquire, from the second memory, the identification information for the interface circuits associated with the identification information for the group indicated by data received from the interface circuit, and generate data by copying the data received from the interface circuit and by addressing to the interface circuit having identification information matching to the acquired identification information for the interface circuit; and a bridge circuit configured to transmit the data generated by the second copy circuit to the interface circuit of a destination, wherein the each interface circuit further includes: an addition circuit configured to add, to the data received on the port, source information including identification information for the interface circuit including the port on which the data has been received and the identification information for the port on which the data block has been received; a first copy circuit configured to acquire, from the first memory, the identification information for the port associated with the identification information for the group indicated by the data received from the switch circuit, and generate data by copying the data received from the switch circuit and by addressing to the port having identification information matching to the acquired identification information for the port; a first deterrence circuit configured to determine whether or not there is a port that matches the source information added to the data received from the switch circuit, and when there is a port that matches the source information, deter the generation of the data by copying the data received from the switch circuit and by addressing to the port having identification information matching the acquired identification information for the port; and a transmitter circuit configured to transmit the data generated by copying the data received from the switch circuit from the port to which the data has been addressed. ### Claim 8 (depends on 7) The communication apparatus according to claim 7, wherein the first copy circuit retrieves, from the first memory, the identification information for the port of one or more belonging to the group having the identification information for the group indicated by the data received from the switch circuit, and generates data by copying the data by addressing to the ports retrieved from the first memory, and wherein the first deterrence circuit determines whether or not the identification information for the interface circuit added to the data received from the switch circuit matches the identification information for the interface circuit including the port on which the data has been received, and when the identification information for the interface circuit added to the data matches the identification information for the interface circuit including the port on which the data has been received, generates data by copying the data received from the switch circuit and by addressing to the ports retrieved from the first memory, excepting the port that matches the source information so as to deter the copy of the data addressed to the ports retrieved from the first memory. ### Claim 9 (depends on 7) The communication apparatus according to claim 7, wherein the switch circuit further includes a second deterrence circuit configured to deter the generation of the data by copying the data received from the interface circuit and by addressing to the interface circuit having one port, when the switch circuit received the data indicating the identification information for the group from the interface circuit that has one port belonging to the group having the identification information for the group indicated by the data received from the interface circuit. ### Claim 10 (depends on 9) The communication apparatus according to claim 9, wherein the addition circuit adds copy deterrence information to the data received on the port, when the port on which the data has been received is one port in the interface circuit that belongs to the group having the identification information for the group indicated by that data, and wherein the second deterrence circuit deters the generation of the data by copying the data addressed to the interface circuit having the one port, when the copy deterrence information is added to a data received from the interface circuit. ### Claim 11 (depends on 10) The communication apparatus according to claim 10, wherein the second copy circuit retrieves, from the second memory, the identification information for the interface circuit having the port belonging to the group having the identification information for the group indicated by the data received from the interface circuit, and generates data by copying the data for the retrieved interface circuits, and wherein the second deterrence circuit generates data by copying the data received from the interface circuit and by addressing to the interface circuit retrieved from the second memory, excepting the interface circuit having the identification information that matches the identification information for the interface circuit added to the data received from the interface circuit so as to deter the copy of the data addressed to the interface circuit retrieved from the second memory, when the copy deterrence information is added to the data received from the interface circuit. ### Claim 12 (depends on 7) The communication apparatus according to any one of claim 7, wherein the switch circuit further includes: a third memory configured to store destination information that includes identification information for a terminal to which data is transferred, identification information for the port coupled with the terminal, and identification information for the interface circuit having the port of one or more, an acquisition circuit configured to acquire, from the third memory, the identification information for the port and the identification information for the interface circuit associated with the identification information for the terminal included in the data received from the interface circuit, and a filter circuit configured to discard the data received from the interface circuit, when the identification information for the interface circuit indicated by the data received from the interface circuit and the identification information for the port in the source information added to the data received from the interface circuit match the identification information for the interface circuit and the identification information for the port acquired by the acquisition circuit, respectively. ### Claim 13 A communication method of a communication apparatus including a plurality of interface circuits and a switch circuit, each interface circuit including a plurality of ports, and first memory configured to store, in each group composed of port of one or more, identification information for the group and identification information for the port belonging to the group, and the switch circuit including second memory configured to store, in the each group, the identification information for the group and identification information for the interface circuit having port belonging to that group, and a bridge circuit configured to transmit data to the interface circuit, the communication method comprising: adding, to the data received on the port, source information including identification information for the interface circuit including the port on which the data has been received and identification information for the port on which the data has been received, by a first processor included in the interface circuit; acquiring, from the second memory, the identification information for the interface circuit associated with the identification information for the group indicated by data received from the interface circuit, by a second processor included in the switch circuit; generating data by copying the data received from the interface circuit and by addressing to the interface circuit having identification information matching to the acquired identification information for interface circuit, by the second processor; acquiring, from the first memory, the identification information for the port associated with the identification information for the group indicated by the data received from the switch circuit, by the first processor; generating data by copying the data received from the switch circuit and by addressing to the port having identification information matching to the acquired identification information for the port, by the first processor; determining whether or not there is a port that matches the source information added to the data received from the switch circuit, by the first processor; deterring the generation of the data by copying the data received from the switch circuit and by addressing to the port having identification information matching to the acquired identification information for the port, when there is the port that matches the source information, by the first processor; and transmitting the data generated by copying the data received from the switch circuit from the port to which the data has been addressed, by the first processor.