# US 2013/0155733 A1 · Generating a fast reset-signal using a fault-protection latch > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0155733 A1 - Document ID: US20130155733A1 - Status: Published application - Kind: A1 - Application number: 13/332,256 - Filed: 2011-12-20 - Published: 2013-06-20 - Earliest claimed: 2011-12-20 - Assignees: Power Integrations, Inc. - Inventors: Robert Mayell - Web page: https://patentgrep.com/patent/US20130155733A1 ## CPC - G01R 31/40: Testing power supplies (testing photovoltaic devices H02S50/10) - H03K 17/22: Modifications for ensuring a predetermined initial state when the supply voltage has been applied (bi-stable generators H03K3/12) - H03K 2017/226: {in bipolar transistor switches} - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract Methods and apparatuses are disclosed for monitoring an ac input for fault conditions. The ac input may be monitored by a latch-reset that uses the ac input to charge a line detection capacitor. The latch-reset may be configured such that the voltage at one end of the line detection capacitor drops below a line detection threshold voltage when the ac input is removed for longer than an allowable period of time or if the voltage of the ac input falls below an acceptable value. The drop in voltage at the end of the capacitor may cause an electrically coupled transistor to switch, thereby causing a reset-signal to be generated. ## Claims ### Claim 1 A latch-reset for detecting a fault condition in an alternating current (ac) input voltage, the latch-reset comprising: a high-impedance circuit comprising an impedance element, a first diode, and a first resistor; a line detection capacitor coupled to the high-impedance circuit, wherein the line detection capacitor is configured to be charged by the ac input voltage through the impedance element and the first diode while the first diode is conducting, and wherein the line detection capacitor is configured to be discharged through the first resistor while the first diode is not conducting; and a transistor, wherein the transistor is configured to switch in response to a voltage at an end of the line detection capacitor dropping below a line detection threshold voltage, and wherein the transistor is further configured to cause a reset-signal to be generated in response to the transistor being switched. ### Claim 2 (depends on 1) The latch-reset of claim 1 further comprising a second diode coupled to a voltage source and a base of the transistor. ### Claim 3 (depends on 2) The latch-reset of claim 2, wherein the line detection threshold voltage is equal to or less than a voltage of the voltage source minus a turn-on threshold voltage of the transistor. ### Claim 4 (depends on 3) The latch-reset of claim 3, wherein the voltage at the end of the line detection capacitor is between the line detection threshold voltage and the voltage of the voltage source plus a turn-on voltage of the second diode during normal operation. ### Claim 5 (depends on 1) The latch-reset of claim 1, wherein the fault condition comprises the ac input voltage being disconnected from a power converter system. ### Claim 6 (depends on 1) The latch-reset of claim 1, wherein the fault condition comprises an under-voltage condition in the AC input voltage. ### Claim 7 (depends on 1) The latch-reset of claim 1, wherein the transistor is a PNP transistor. ### Claim 8 A latch-reset for detecting a fault condition in an alternating current (ac) input voltage, the latch-reset comprising: an impedance element coupled to receive the ac input voltage; and a transistor, wherein the transistor is configured to switch in response to the ac input voltage dropping below an input voltage threshold, and wherein the transistor is further configured to cause a reset-signal to be generated when the transistor is switched. ### Claim 9 (depends on 8) The latch-reset of claim 8, wherein the transistor is a PNP transistor. ### Claim 10 (depends on 8) The latch-reset of claim 8 further comprising a line detection capacitor coupled to the transistor, wherein the transistor switches in response to a voltage at an end of the line detection capacitor decreasing below a line detection threshold voltage, and wherein the voltage at the end of the line detection capacitor decreases below the line detection threshold voltage in response to the ac input voltage dropping below the input voltage threshold. ### Claim 11 (depends on 8) The latch-reset of claim 8, wherein the latch-reset further comprises a diode coupled to a voltage source and a base of the transistor. ### Claim 12 (depends on 11) The latch-reset of claim 11, wherein the line detection threshold voltage is equal to or less than a voltage of the voltage source minus a turn-on threshold voltage of the transistor. ### Claim 13 (depends on 12) The latch-reset of claim 12, wherein the voltage at the end of the line detection capacitor is between the line detection threshold voltage and the voltage of the voltage source plus a turn-on voltage of the diode during normal operation. ### Claim 14 (depends on 8) The latch-reset of claim 8, wherein the impedance element comprises a resistor or a capacitor. ### Claim 15 A method for detecting a fault condition in an alternating current (ac) input voltage, the method comprising: receiving the ac input voltage at a high-impedance circuit, the high-impedance circuit comprising an impedance element, a first diode, and a first resistor; charging, using the ac input voltage, a line detection capacitor through the impedance element and the first diode, wherein the line detection capacitor is charged while the first diode is conducting; discharging the line detection capacitor through the first resistor, wherein the line detection capacitor is discharged while the first diode is not conducting; monitoring a voltage at an end of the line detection capacitor using a transistor, wherein the transistor is configured to switch in response to a voltage at the end of the line detection capacitor dropping below a line detection threshold voltage; and causing a reset-signal to be generated in response to the transistor being switched. ### Claim 16 (depends on 15) The method of claim 15, wherein the high-impedance circuit further comprises a second diode coupled to a voltage source and a base of the transistor. ### Claim 17 (depends on 16) The method of claim 16, wherein the line detection threshold voltage is equal to or less than a voltage of the voltage source minus a turn-on threshold voltage of the transistor. ### Claim 18 (depends on 17) The method of claim 17, wherein the voltage at the end of the line detection capacitor is between the line detection threshold voltage and the voltage of the voltage source plus a turn-on voltage of the second diode during normal operation. ### Claim 19 (depends on 15) The method of claim 15, wherein the fault condition comprises the ac input voltage being disconnected from a power converter system. ### Claim 20 (depends on 15) The method of claim 15, wherein the fault condition comprises an under-voltage condition in the ac input voltage. ### Claim 21 (depends on 15) The method of claim 15, wherein the transistor is a PNP transistor. ### Claim 22 A power converter system, comprising: an ac bridge coupled to receive an ac input voltage and coupled to output a time-varying dc voltage; a power converter coupled to the ac bridge and coupled to receive the time varying dc voltage and to output a regulated dc output voltage; a controller coupled to the power converter and coupled to control the transfer of energy through the power converter; and a latch-reset coupled to receive the ac input voltage and coupled to output a reset signal to the controller in response to the ac input voltage dropping below an input voltage threshold, wherein the latch-reset comprises a high impedance element coupled to receive the ac input voltage. ### Claim 23 (depends on 22) The power converter of claim 22, wherein the latch-reset further comprises: a line detection capacitor, wherein a voltage at an end of the line detection capacitor decreases below a line detection threshold voltage in response to the ac input voltage dropping below the input voltage threshold; and a transistor, wherein the transistor is configured to switch when the voltage at the end of the line detection capacitor decreases below the line detection threshold, and wherein the transistor is further configured to cause the reset-signal to be generated when the transistor is switched. ### Claim 24 (depends on 23) The power converter of claim 23, wherein the latch-reset further comprises a diode coupled to a voltage source. ### Claim 25 (depends on 24) The power converter of claim 24, wherein the line detection threshold voltage is equal to or less than a voltage of the voltage source minus a turn-on threshold voltage of the transistor. ### Claim 26 (depends on 25) The power converter of claim 25, wherein the voltage at the end of the line detection capacitor is between the line detection threshold and the voltage of the voltage source plus a turn-on voltage of the diode during normal operation. ### Claim 27 (depends on 22) The power converter of claim 22, wherein the transistor is a PNP transistor.