# US 2013/0155282 A1 · Image sensor readout method and apparatus > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0155282 A1 - Document ID: US20130155282A1 - Status: Published application - Kind: A1 - Application number: 13/710,198 - Filed: 2012-12-10 - Published: 2013-06-20 - Earliest claimed: 2011-12-15 - Assignees: STMicroelectronics (R&D) Ltd. - Inventors: Robert Golding - Web page: https://patentgrep.com/patent/US20130155282A1 ## CPC - H10F 39/803: {Pixels having integrated switching, control, storage or amplification elements} - H04N 25/00: Circuitry of solid-state image sensors [SSIS]; Control thereof - H04N 25/587: acquired sequentially, e.g. using the combination of odd and even image fields - H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters - G01N 21/645: {Specially adapted constructive features of fluorimeters} - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION - G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q) ## Abstract A pixel readout circuit including at least first, second and third memory locations. During an integration period of a pixel, the pixel readout circuit repeatedly samples the pixel output level during the integration period, stores the first sample in the first memory location, and stores each subsequent sample in memory locations other than the first memory location. Each sample is stored with a time corresponding to when that sample was taken, such that at any one time subsequent to the first three samples having been stored, at least the first sample and the two most recent samples are stored. Also disclosed is a corresponding method of reading out of a pixel output over an undefined integration period. ## Claims ### Claim 1 A pixel readout circuit comprising at least first, second and third memory locations wherein, during an integration period of a pixel, said pixel readout circuit is operable to repeatedly sample the pixel output level during the integration period, to store the first sample in said first memory location, and to store each subsequent sample in memory locations other than said first memory location, each sample being stored with a time corresponding to when that sample was taken, such that at any one time subsequent to the first three samples having been stored, at least the first sample and the two most recent samples are stored. ### Claim 2 (depends on 1) A pixel readout circuit as claimed in claim 1 wherein said memory locations comprise separate SRAMs. ### Claim 3 (depends on 1) A pixel readout circuit as claimed in claim 1, wherein each sample subsequent to the first and its corresponding time is alternately stored in said second and third memory locations. ### Claim 4 (depends on 1) A pixel readout circuit as claimed in claim 1, wherein said pixel readout circuit is operable to sample the pixel output level at set intervals. ### Claim 5 (depends on 1) A pixel readout circuit as claimed in claim 1, operable to cease sampling of the pixel output level when the pixel output level reaches a predetermined threshold. ### Claim 6 (depends on 5) A pixel readout circuit as claimed in claim 5 operable such that said predetermined threshold is determined relative to the pixel saturation level. ### Claim 7 (depends on 5) A pixel readout circuit as claimed in claim 5 operable, once said sampling has ceased, to perform correlated sampling of said pixel output using the contents of said first memory location and the contents of the memory location in which the penultimate sample taken is stored. ### Claim 8 (depends on 1) A pixel readout circuit as claimed in claim 1, wherein said pixel readout circuit comprises a global counter operable to calculate said times corresponding to when each sample was taken, relative to the beginning of the pixel integration period. ### Claim 9 (depends on 1) A pixel readout circuit as claimed in claim 1, wherein said pixel readout circuit comprises a ramp generator that is operable to begin ramping at the beginning of each sample. ### Claim 10 (depends on 1) A pixel readout circuit as claimed in claim 1, wherein said pixel readout circuit is further operable to store the time taken to pixel saturation. ### Claim 11 (depends on 1) A digital image sensor comprising an array of pixels, wherein each pixel has a corresponding pixel readout circuit according to claim 1. ### Claim 12 (depends on 9) A biosensor comprising a digital image sensor according to claim 9. ### Claim 13 A method of reading out of a pixel output over an undefined integration period, comprising the steps of: repeatedly sampling the pixel output level during said integration period; storing the first sample in a first memory location along with a time corresponding to when the first sample was taken; storing each subsequent sample in memory locations other than said first memory location along with a time corresponding to when that sample was taken, such that at any one time at least the first sample and the two most recent samples are stored. ### Claim 14 (depends on 13) The method of claim 13 wherein said subsequent samples are taken and stored until such time as the pixel output level reaches a predetermined threshold. ### Claim 15 (depends on 14) The method of claim 14 wherein said predetermined threshold is determined relative to the pixel saturation level. ### Claim 16 (depends on 14) The method of claim 14 further comprising, once said sampling has ceased, using the contents of said first memory location and the contents of the memory location in which the penultimate sample taken is stored in correlated sampling of the pixel output. ### Claim 17 (depends on 13) The method of claim 13, being performed for multiple pixels over different integration periods. ### Claim 18 (depends on 13) The method of claim 13, wherein said method further includes storing the time taken to saturation for the/each pixel. ### Claim 19 (depends on 13) The method of claim 13, further including sampling the pixel output level at set intervals. ### Claim 20 (depends on 13) The method of claim 13, wherein each subsequent sample, and its corresponding time, is alternately stored in second and third memory locations, said method comprising a method of performing correlated double sampling.