# US 2013/0155080 A1 · Graphics processing unit with command processor

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- Number: US 2013/0155080 A1
- Document ID: US20130155080A1
- Status: Published application
- Kind: A1
- Application number: 13/327,069
- Filed: 2011-12-15
- Published: 2013-06-20
- Earliest claimed: 2011-12-15
- Assignees: QUALCOMM Incorporated
- Inventors: Petri Olavi Nordlund; Jukka-Pekka Arvo; Robert J. Simpson
- Web page: https://patentgrep.com/patent/US20130155080A1

## CPC

- G06T 15/005: {General purpose rendering architectures}
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL

## Abstract

Aspects of the disclosure relate to a method of controlling a graphics processing unit. In an example, the method includes receiving one or more tasks from a host processor, and scheduling, independently from the host processor, the one or more tasks to be selectively executed by a shader processor and one or more fixed function hardware units, wherein the shader processor is configured to execute a plurality of instructions in parallel, and the one or more fixed function hardware units are configured to render graphics data.

## Claims

### Claim 1

A graphics processing unit comprising:
a shader processor configured to execute a plurality of instructions in parallel;
one or more fixed function hardware units configured to render graphics data; and
a command processor unit configured to receive one or more tasks from a host processor and independently schedule the one or more tasks to be selectively executed by the shader processor and the one or more fixed function hardware units.

### Claim 2 (depends on 1)

The graphics processing unit of claim 1, wherein the command processor is configured to maintain a command queue of the one or more tasks that are received, wherein the command queue comprises a list of tasks to be executed by the graphics processing unit.

### Claim 3 (depends on 1)

The graphics processing unit of claim 1, wherein the command processor is configured to determine a respective priority of the one or more tasks and schedule the one or more tasks based on the respective priority of the one or more tasks.

### Claim 4 (depends on 1)

The graphics processing unit of claim 1, wherein the command processor is configured to receive an indication of a respective priority of the one or more tasks from a host processor and schedule the one or more tasks based on the respective priority of the one or more tasks.

### Claim 5 (depends on 1)

The graphics processing unit of claim 1, wherein the command processor is configured to maintain a list of active tasks, wherein an active task is a task that is currently being executed by at least one of the shader processor and the one or more fixed function hardware units.

### Claim 6 (depends on 1)

The graphics processing unit of claim 1, wherein the command processor is configured to stop execution of a first task of the one or more tasks and begin execution of a second task of the one or more tasks.

### Claim 7 (depends on 1)

The graphics processing unit of claim 1, further comprising a memory copy engine configured to copy data from a memory of the graphics processing unit to a memory of the shader processor.

### Claim 8 (depends on 7)

The graphics processing unit of claim 7, wherein the command processor controls the operation of the memory copy engine.

### Claim 9

A method for controlling a graphics processing unit comprising:
receiving one or more tasks from a host processor; and
scheduling, independently from the host processor, the one or more tasks to be selectively executed by a shader processor and one or more fixed function hardware units, wherein the shader processor is configured to execute a plurality of instructions in parallel, and the one or more fixed function hardware units are configured to render graphics data.

### Claim 10 (depends on 9)

The method of claim 9, further comprising maintaining a command queue of the one or more tasks that are received, wherein the command queue comprises a list of tasks to be executed by the graphics processing unit.

### Claim 11 (depends on 9)

The method of claim 9, further comprising determining a respective priority of the one or more tasks and scheduling the one or more tasks based on the respective priority of the one or more tasks.

### Claim 12 (depends on 9)

The method of claim 9, further comprising maintaining a list of active tasks, wherein an active task is a task that is currently being executed by at least one of the shader processor and the one or more fixed function hardware units.

### Claim 13 (depends on 9)

The method of claim 9, further comprising interrupting execution of a first task of the one or more tasks and beginning execution of a second task of the one or more tasks.

### Claim 14 (depends on 9)

The method of claim 9, further comprising copying data from a memory of the graphics processing unit to a memory of the shader processor prior to execution of the one or more tasks.

### Claim 15

An apparatus for controlling a graphics processing unit comprising:
means for receiving one or more tasks from a host processor; and
means for scheduling, independently from the host processor, the one or more tasks to be selectively executed by a shader processor and one or more fixed function hardware units, wherein the shader processor is configured to execute a plurality of instructions in parallel, and the one or more fixed function hardware units are configured to render graphics data.

### Claim 16 (depends on 15)

The apparatus of claim 15, further comprising means for maintaining a command queue of the one or more tasks that are received, wherein the command queue comprises a list of tasks to be executed by the graphics processing unit.

### Claim 17 (depends on 15)

The apparatus of claim 15, further comprising means for determining a respective priority of the one or more tasks and scheduling the one or more tasks based on the respective priority of the one or more tasks.

### Claim 18 (depends on 15)

The apparatus of claim 15, further comprising means for maintaining a list of active tasks, wherein an active task is a task that is currently being executed by at least one of the shader processor and the one or more fixed function hardware units.

### Claim 19 (depends on 15)

The apparatus of claim 15, further comprising means for interrupting execution of a first task of the one or more tasks and beginning execution of a second task of the one or more tasks.

### Claim 20 (depends on 15)

The apparatus of claim 15, further comprising means for copying data from a memory of the graphics processing unit to a memory of the shader processor prior to execution of the one or more tasks.

### Claim 21

A computer program product comprising a computer-readable medium comprising stored thereon instructions that, when executed, cause one or more processors to:
receive one or more tasks from a host processor; and
schedule, independently from the host processor, the one or more tasks to be selectively executed by a shader processor and one or more fixed function hardware units, wherein the shader processor is configured to execute a plurality of instructions in parallel, and the one or more fixed function hardware units are configured to render graphics data.

### Claim 22 (depends on 21)

The computer program product of claim 21, further comprising instructions stored thereon instructions that, when executed, cause the one or more processors to maintain a command queue of the one or more tasks that are received, wherein the command queue comprises a list of tasks to be executed by the graphics processing unit.

### Claim 23 (depends on 21)

The computer program product of claim 21, further comprising instructions stored thereon instructions that, when executed, cause the one or more processors to determine a respective priority of the one or more tasks and scheduling the one or more tasks based on the respective priority of the one or more tasks.

### Claim 24 (depends on 21)

The computer program product of claim 21, further comprising instructions stored thereon instructions that, when executed, cause the one or more processors to maintain a list of active tasks, wherein an active task is a task that is currently being executed by at least one of the shader processor and the one or more fixed function hardware units.

### Claim 25 (depends on 21)

The computer program product of claim 21, further comprising instructions stored thereon instructions that, when executed, cause the one or more processors to interrupt execution of a first task of the one or more tasks and beginning execution of a second task of the one or more tasks.

### Claim 26 (depends on 21)

The computer program product of claim 21, further comprising instructions stored thereon instructions that, when executed, cause the one or more processors to copy data from a memory of the graphics processing unit to a memory of the shader processor prior to execution of the one or more tasks.