# US 2013/0155074 A1 · Syscall mechanism for processor to processor calls

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- Number: US 2013/0155074 A1
- Document ID: US20130155074A1
- Status: Published application
- Kind: A1
- Application number: 13/327,443
- Filed: 2011-12-15
- Published: 2013-06-20
- Earliest claimed: 2011-12-15
- Assignees: Advanced Micro Devices, Inc.
- Inventors: Norman RUBIN; Michael Mantor
- Web page: https://patentgrep.com/patent/US20130155074A1

## CPC

- G06F 9/3877: {using a secondary processor, e.g. coprocessor (peripheral processor G06F13/12)}
- G06T 1/20: Processor architectures; Processor configuration, e.g. pipelining
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL

## Abstract

Provided is a method for processing system calls from a GPU to a CPU. The method includes a GPU storing a plurality of tasks in a memory, with each task representing a function to be performed on the CPU. The method also includes generating a CPU interrupt, and processing of the stored plurality of tasks by the CPU.

## Claims

### Claim 1

A method for execution in a system comprising:
storing a plurality of tasks output from an APD in memory, each task representing a function to be performed on a CPU; and
generating a CPU interrupt.

### Claim 2 (depends on 1)

The method of claim 1 further comprising:
processing by the CPU, the stored plurality of tasks.

### Claim 3 (depends on 1)

The method of claim 1, wherein the tasks are stored in a plurality of mailboxes.

### Claim 4 (depends on 3)

The method of claim 3, further comprising:
a work item scanning mailboxes for an empty mailbox.

### Claim 5 (depends on 1)

The method of claim 1, further comprising:
executing an instruction for a wave front to go to sleep.

### Claim 6

A method for execution in a computer system including a memory, the method comprising:
receiving, in a CPU, an interrupt from an APD; and
processing by the CPU a plurality of tasks stored in the memory, each task representing a function to be performed on the CPU.

### Claim 7 (depends on 6)

The method of claim 6, further comprising:
writing the results of the processing by the CPU in the memory.

### Claim 8

A system, comprising:
a memory configured to store a plurality of tasks, each task representing a function to be performed on a CPU; and
an APD configured to generate a CPU interrupt.

### Claim 9

A system, comprising:
a memory configured to store a plurality of tasks, each task representing a function to be performed on a CPU;
wherein the CPU is (i) configured to receive an interrupt and (ii) process the stored plurality of tasks from the memory.

### Claim 10 (depends on 9)

The system of claim 9, wherein the memory is further configured to store the plurality of tasks in a plurality of mailboxes.

### Claim 11

An article of manufacture including a computer-readable medium having instructions stored thereon that, when executed by a computing device, cause the computing device to cause a central processing unit (CPU) to process a plurality of tasks from an accelerated processing device (APD), comprising:
storing a plurality of tasks output from the APD in a memory, each task representing a function to be performed on the CPU;
generating a CPU interrupt; and
processing, by the CPU, the stored plurality of tasks.

### Claim 12

A non-transitory computer-readable medium having instructions recorded thereon that, when executed by a computing device, cause the computing device to perform a method for an accelerated processing device (APD) to request a central processing unit (CPU) to process a plurality of tasks, comprising:
instructions to store a plurality of tasks output from the APD in a memory, each task representing a function to be performed on the CPU;
generating a CPU interrupt; and
reading from the memory, by the CPU, the stored plurality of tasks.

### Claim 13 (depends on 12)

The computer-readable medium of claim 12, wherein the plurality of tasks are stored in a plurality of mailboxes.