# US 2013/0154790 A1 · Chip resistor and method of manufacturing the same

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- Number: US 2013/0154790 A1
- Document ID: US20130154790A1
- Status: Published application
- Kind: A1
- Application number: 13/441,596
- Filed: 2012-04-06
- Published: 2013-06-20
- Earliest claimed: 2011-12-19
- Assignees: Samsung Electro-Mechanics Co., Ltd.
- Inventors: Jang Ho Park; Young Key Kim; Ki Won Suh; Jang Seok Yun; Jin Man Han; Sung Jun Kim
- Web page: https://patentgrep.com/patent/US20130154790A1

## CPC

- H01C 7/18: comprising a plurality of layers stacked between terminals
- H01C 17/065: by thick film techniques, e.g. serigraphy
- H01C 17/06526: {composed of metals}
- Y10T 29/49082: Resistor making
- H01C: RESISTORS
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

There is provided a chip resistor including a ceramic substrate; a first resistance layer formed on the ceramic substrate and including a first conductive metal and a first glass; and a second resistance layer formed on the first resistance layer, including a second conductive metal and a second glass, and having a smaller content of glass than the first resistance layer, thereby obtaining relatively low resistance and a relatively small temperature coefficient of resistance (TCR).

## Claims

### Claim 1

A chip resistor, comprising:
a ceramic substrate;
a first resistance layer formed on the ceramic substrate and including a first conductive metal and a first glass; and
a second resistance layer formed on the first resistance layer, including a second conductive metal and a second glass, and having a smaller content of glass than the first resistance layer.

### Claim 2 (depends on 1)

The chip resistor of claim 1, wherein the second resistance layer includes two or more layers.

### Claim 3 (depends on 1)

The chip resistor of claim 1, wherein the first conductive metal includes a copper (Cu)-nickel (Ni) alloy.

### Claim 4 (depends on 3)

The chip resistor of claim 3, wherein a content of Ni of the first and second conductive metals ranges from 18 to 70 wt %.

### Claim 5 (depends on 1)

The chip resistor of claim 1, wherein the second conductive metal includes a Cu—Ni alloy.

### Claim 6 (depends on 5)

The chip resistor of claim 5, wherein a content of Ni of the first and second conductive metals ranges from 18 to 70 wt %.

### Claim 7 (depends on 1)

The chip resistor of claim 1, wherein the first and second conductive metals have the same composition of the Cu—Ni alloy.

### Claim 8 (depends on 1)

The chip resistor of claim 1, wherein a content of the first glass of the first resistance layer is 3 to 40 parts by weight based on 100 parts by weight of the first conductive metal.

### Claim 9 (depends on 1)

The chip resistor of claim 1, wherein a thickness of the first resistance layer ranges from 5 to 40 um.

### Claim 10 (depends on 1)

The chip resistor of claim 1, wherein a thickness of the second resistance layer ranges from 10 to 70 um.

### Claim 11 (depends on 1)

The chip resistor of claim 1, wherein a total thickness of the first and second resistance layers is equal to or smaller than 110 um.

### Claim 12 (depends on 1)

The chip resistor of claim 1, wherein the ceramic substrate is an alumina substrate.

### Claim 13

A chip resistor, comprising:
a ceramic substrate;
a first resistance layer formed on the ceramic substrate and including a first conductive metal and glass; and
a second resistance layer formed on the first resistance layer, including a second conductive metal, and not including the glass.

### Claim 14 (depends on 13)

The chip resistor of claim 13, wherein the second resistance layer includes two or more layers.

### Claim 15 (depends on 13)

The chip resistor of claim 13, wherein the first conductive metal includes a Cu—Ni alloy.

### Claim 16 (depends on 15)

The chip resistor of claim 15, wherein a content of Ni of the first and second conductive metals ranges from 18 to 70 wt %.

### Claim 17 (depends on 13)

The chip resistor of claim 13, wherein the second conductive metal includes a Cu—Ni alloy.

### Claim 18 (depends on 17)

The chip resistor of claim 17, wherein a content of Ni of the first and second conductive metals ranges from 18 to 70 wt %.

### Claim 19 (depends on 13)

The chip resistor of claim 13, wherein the first and second conductive metals have the same composition of the Cu—Ni alloy.

### Claim 20 (depends on 13)

The chip resistor of claim 13, wherein a content of the glass of the first resistance layer is 3 to 40 parts by weight based on 100 parts by weight of the first conductive metal.

### Claim 21 (depends on 13)

The chip resistor of claim 13, wherein a thickness of the first resistance layer ranges from 5 to 40 um.

### Claim 22 (depends on 13)

The chip resistor of claim 13, wherein a thickness of the second resistance layer ranges from 10 to 70 um.

### Claim 23 (depends on 13)

The chip resistor of claim 13, wherein a total thickness of the first and second resistance layers is equal to or smaller than 110 um.

### Claim 24 (depends on 13)

The chip resistor of claim 13, wherein the ceramic substrate is an alumina substrate.

### Claim 25

A method of manufacturing a chip resistor, the method comprising:
forming a first resistance layer using a first conductive paste including a first conductive metal and a first glass, on a ceramic substrate; and
forming a second resistance layer using a second conductive paste including a second conductive metal and a second glass on the first resistance layer, the second conductive paste having a smaller content of glass than the first conductive paste.

### Claim 26 (depends on 25)

The method of claim 25, wherein the ceramic substrate is an alumina substrate.

### Claim 27 (depends on 25)

The method of claim 25, wherein the first conductive metal includes Cu and Ni.

### Claim 28 (depends on 27)

The method of claim 27, wherein a mean diameter of the Ni is ½ or smaller than a mean diameter of the Cu.

### Claim 29 (depends on 27)

The method of claim 27, wherein a content of Ni of the first and second conductive metals ranges from 18 to 70 wt %.

### Claim 30 (depends on 25)

The method of claim 25, wherein the second conductive metal includes Cu and Ni.

### Claim 31 (depends on 30)

The method of claim 30, wherein a mean diameter of the Ni is ½ or smaller than a mean diameter of the Cu.

### Claim 32 (depends on 30)

The method of claim 30, wherein a content of Ni of the first and second conductive metals ranges from 18 to 70 wt %.

### Claim 33 (depends on 25)

The method of claim 25, wherein the first and second conductive metals have the same composition of Cu—Ni alloy.

### Claim 34 (depends on 25)

The method of claim 25, wherein a content of the first glass ranges from 3 to 40 parts by weight based on 100 parts by weight of the first conductive metal.

### Claim 35 (depends on 25)

The method of claim 25, wherein the first and second resistance layers are formed by a printing method.

### Claim 36 (depends on 25)

The method of claim 25, wherein a mean diameter of the second conductive metal is greater than a mean diameter of the first conductive metal.

### Claim 37 (depends on 25)

The method of claim 25, further comprising, after the forming of the second resistance layer, sintering the second resistance layer.

### Claim 38 (depends on 37)

The method of claim 37, wherein the sintering is sequentially performed in an oxidation atmosphere and a reduction atmosphere.

### Claim 39 (depends on 38)

The method of claim 38, wherein the reduction atmosphere is a hydrogen atmosphere.

### Claim 40

A method of manufacturing a chip resistor, the method comprising:
forming a first resistance layer using a first conductive paste including a first conductive metal and glass, on a ceramic substrate; and
forming a second resistance layer using a second conductive paste including a second conductive metal and not including glass, on the first resistance layer.

### Claim 41 (depends on 40)

The method of claim 40, wherein the ceramic substrate is an alumina substrate.

### Claim 42 (depends on 40)

The method of claim 40, wherein the first conductive metal includes Cu and Ni.

### Claim 43 (depends on 42)

The method of claim 42, wherein a mean diameter of powder particles of the Ni is ½ or smaller than a mean diameter of powder particles of the Cu.

### Claim 44 (depends on 42)

The method of claim 42, wherein a content of Ni of the first and second conductive metals ranges from 18 to 70 wt %.

### Claim 45 (depends on 40)

The method of claim 40, wherein the second conductive metal includes Cu and Ni.

### Claim 46 (depends on 45)

The method of claim 45, wherein a mean diameter of powder particles of the Ni is ½ or smaller than a mean diameter of powder particles of the Cu.

### Claim 47 (depends on 45)

The method of claim 45, wherein a content of Ni of the first and second conductive metals ranges from 18 to 70 wt %.

### Claim 48 (depends on 40)

The method of claim 40, wherein the first and second conductive metals have the same composition of Cu—Ni alloy.

### Claim 49 (depends on 40)

The method of claim 40, wherein the first and second resistance layers are formed by a printing method.

### Claim 50 (depends on 40)

The method of claim 40, wherein a mean diameter of the second conductive metal is greater than a mean diameter of the first conductive metal.

### Claim 51 (depends on 40)

The method of claim 40, further comprising, after the forming of the second resistance layer, sintering the second resistance layer.

### Claim 52 (depends on 51)

The method of claim 51, wherein the sintering is sequentially performed in an oxidation atmosphere and a reduction atmosphere.

### Claim 53 (depends on 52)

The method of claim 52, wherein the reduction atmosphere is a hydrogen atmosphere.