# US 2013/0154744 A1 · Non-Linear Capacitance Compensation

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- Number: US 2013/0154744 A1
- Document ID: US20130154744A1
- Status: Published application
- Kind: A1
- Application number: 13/690,138
- Filed: 2012-11-30
- Published: 2013-06-20
- Earliest claimed: 2008-03-31
- Assignees: Avago Technologies General IP (Singapore) Pte. Ltd.
- Inventors: Anil Samavedam; David E. Bockelman; Vishnu Srinivasan; Eric Kimball
- Web page: https://patentgrep.com/patent/US20130154744A1

## CPC

- H03G 3/00: Gain control in amplifiers or frequency changers
- H03F 1/086: {with FET's}
- H03F 1/14: by use of neutralising means
- H03F 3/19: with semiconductor devices only
- H03F 3/245: {with semiconductor devices only}
- H03F 3/3022: {CMOS common source output SEPP amplifiers (H03F3/3008 takes precedence)}
- H03F 3/45251: {Complementary Pl types having parallel inputs and being supplied in series}
- H03F 2200/451: the amplifier being a radio frequency amplifier
- H03F 2203/30144: the SEPP comprising a reactive element in the amplifying circuits
- H03G: CONTROL OF AMPLIFICATION
- H03F: AMPLIFIERS

## Abstract

Embodiments are directed to capacitance compensation via a compensation device coupled to a gain device to compensate for a capacitance change occurring due to an input signal change, along with a controller coupled to the compensation device to receive the input signal and to control an amount of compensation based on the input signal. In some embodiments, banks may be formed of multiple compensation devices, where each of the banks has a different size and is coupled to receive a different set of bias voltages.

## Claims

### Claim 1

An apparatus comprising:
a gain device to receive an input signal and to output an amplified signal; and
a compensation device coupled to the gain device to compensate for a change in a capacitance of the gain device occurring due to a change in the input signal; and
a controller coupled to the compensation device to receive the input signal and to control an amount of capacitance compensation provided by the compensation device based on the input signal.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the compensation device is biased in an inversion region.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the compensation device includes a complementary metal oxide semiconductor (CMOS) transistor having a first terminal coupled to a first bias voltage node, a second terminal coupled to a first capacitor, and a gate terminal coupled to the first capacitor at a second bias voltage node, the second bias voltage node to receive the input signal.

### Claim 4 (depends on 3)

The apparatus of claim 3, wherein the CMOS transistor is to be set deep into strong inversion when disabled and substantially close to strong inversion when enabled.

### Claim 5 (depends on 3)

The apparatus of claim 3, wherein the CMOS transistor is to be set deep into accumulation when disabled and substantially close to strong inversion when enabled.

### Claim 6 (depends on 3)

The apparatus of claim 3, wherein a size of the first capacitor is controllable by the controller.

### Claim 7 (depends on 1)

The apparatus of claim 1, further comprising a plurality of compensation devices, each to be individually enabled or disabled by the controller based on the capacitance change.

### Claim 8 (depends on 7)

The apparatus of claim 7, further comprising a plurality of banks formed of the plurality of compensation devices, wherein each of the banks has a different size and is coupled to receive a different set of bias voltages.

### Claim 9 (depends on 1)

The apparatus of claim 1, wherein the compensation device is coupled to an input of the gain device via an attenuation network.

### Claim 10 (depends on 9)

The apparatus of claim 9, wherein the gain device is of a differential amplifier of a gain stage, the differential amplifier further including a second gain device, and the attenuation network including:
a first capacitor coupled between differential input lines coupled to inputs of the gain device and the second gain device; and
a series capacitor coupled to the inputs to each of the gain device and the second gain device, wherein the compensation device is of a non-linear capacitance compensation circuit including a plurality of compensation devices each coupled between a plurality of bias voltages and one of the inputs.

### Claim 11

A power amplifier comprising:
a gain stage having first and second complementary amplifiers, the gain stage to receive a differential input signal and to output a differential amplified signal;
a transformer having a first side and a second side, the second side to provide the differential input signal to the gain stage; and
first and second compensation devices coupled to the first side, wherein each of the first and second compensation devices is to compensate for a change in capacitance of at least a portion of the first and second complementary amplifiers responsive to a signal swing of the differential input signal.

### Claim 12 (depends on 11)

The power amplifier of claim 11, wherein the first side includes a first coil, the first compensation device is coupled between a bias voltage node and a first terminal of the first coil coupled to a first input line, and the second compensation device is coupled between the bias voltage node and a second terminal of the first coil coupled to a second input line, the first and second input lines to receive the differential input signal.

### Claim 13 (depends on 12)

The power amplifier of claim 12, wherein the second side includes a second coil and a third coil.

### Claim 14 (depends on 13)

The power amplifier of claim 13, wherein the second coil is to provide the differential input signal to first amplifiers of the first and second complementary amplifiers and the third coil is to provide the differential input signal to second amplifiers of the first and second complementary amplifiers.

### Claim 15 (depends on 14)

The power amplifier of claim 14, further comprising third and fourth compensation devices coupled to the first side, wherein each of the third and fourth compensation devices is to compensate for the capacitance change of at least a portion of the first and second complementary amplifiers responsive to the signal swing.

### Claim 16 (depends on 15)

The power amplifier of claim 15, wherein the first and second compensation devices form a first pair of compensation devices and the third and fourth compensation devices form a second pair of compensation devices, each of the first and second pairs to be individually enabled or disabled based on a level of the differential input signal.

### Claim 17 (depends on 16)

The power amplifier of claim 16, wherein the disabled compensation devices are to be placed into an accumulation region.

### Claim 18 (depends on 16)

The power amplifier of claim 16, wherein each of the first and second pairs is coupled between the bias voltage node and the first and second input lines, wherein the bias voltage node is to be provided with a first bias voltage to enable the corresponding pair and a second bias voltage to disable the pair.