# US 2013/0154740 A1 · Techniques for pga linearity > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0154740 A1 - Document ID: US20130154740A1 - Status: Published application - Kind: A1 - Application number: 13/421,440 - Filed: 2012-03-15 - Published: 2013-06-20 - Earliest claimed: 2011-12-16 - Assignees: QUALCOMM Incorporated - Inventors: Weijun Serena Xie - Web page: https://patentgrep.com/patent/US20130154740A1 ## CPC - H03F 3/45475: {using IC blocks as the active amplifying circuit} - H03F 1/3211: {in differential amplifiers} - H03G 1/0088: {using discontinuously variable devices, e.g. switch-operated} - H03G 3/001: {Digital control of analog signals} - H03F 2203/45522: the FBC comprising one or more potentiometers - H03F 2203/45534: the FBC comprising multiple switches and being coupled between the LC and the IC - H03F 2203/45591: the IC comprising one or more potentiometers - H03F 2203/45616: the IC comprising more than one switch, which are not cross coupled - H03F: AMPLIFIERS - H03G: CONTROL OF AMPLIFICATION ## Abstract Techniques for designing a highly linear programmable gain amplifier (PGA). In an aspect, the PGA includes a plurality of feedback switches selectively coupling an output of an operational amplifier (op amp) to an input of the op amp via a corresponding series-coupled feedback resistance. The PGA may further include a plurality of input switches selectively coupling an input of the op amp to a PGA input voltage via a corresponding series-coupled input resistance. The switches are designed such that the ratio of on-resistances between any two switches is substantially equal to the ratio of the corresponding series-coupled resistances. In an exemplary embodiment, transistors implementing the switches may be accordingly sized to implement the desired on-resistance ratios. ## Claims ### Claim 1 An apparatus comprising: an amplifier having differential input terminals and at least one output; at least one feedback resistance coupled in series with a corresponding feedback switch, each feedback resistance and corresponding feedback switch coupling a terminal of the at least one output to a differential input terminal; and at least one input resistance coupled in series with a corresponding input switch, each input switch coupling a terminal of the differential input to a corresponding input resistance; wherein the ratio between the on-resistances of any two switches is configured to be substantially equal to the ratio of the corresponding series-coupled resistances to each other. ### Claim 2 (depends on 1) The apparatus of claim 1, the at least one feedback resistance comprising first and second feedback resistances, wherein the ratio between the on-resistances of the feedback switches coupled to the first and second feedback resistances is substantially equal to the ratio between the first and second feedback resistances. ### Claim 3 (depends on 1) The apparatus of claim 1, the at least one feedback resistance comprising a plurality of feedback resistances, the at least one input resistance comprising a single input resistance, wherein the ratio of the on-resistance of each feedback switch to the on-resistance of the input switch is substantially equal to the ratio of the corresponding feedback resistance to the single input resistance. ### Claim 4 (depends on 1) The apparatus of claim 1, each switch comprising an MOS transistor. ### Claim 5 (depends on 4) The apparatus of claim 4, each switch comprising an MOS transistor with a width-to-length ratio set in inverse proportion to the corresponding series-coupled resistance. ### Claim 6 (depends on 1) The apparatus of claim 1, at least one of the at least one input resistance and the at least one feedback resistance comprising a dummy switch that is always closed. ### Claim 7 (depends on 1) The apparatus of claim 1, the at least one output comprising a single-ended output terminal, each feedback switch electrically coupling the single-ended output terminal to the negative input terminal via a corresponding feedback resistance when said feedback switch is selectively closed, and each input switch coupling the negative input terminal to a corresponding input resistance, each of the at least one input resistance further coupled to a ground voltage. ### Claim 8 (depends on 1) The apparatus of claim 1, the at least one output comprising positive and negative output terminals, a first plurality of feedback switches each coupling the negative output terminal to the positive input terminal via corresponding feedback resistances when said first plurality of feedback switches are selectively closed, a second plurality of feedback switches each coupling the positive output terminal to the negative input terminal via corresponding feedback resistances when said second plurality of feedback switches are selectively closed. ### Claim 9 (depends on 1) The apparatus of claim 1, wherein the positive and negative input terminals are coupled to PGA (programmable gain amplifier) input voltages that are fully differential with respect to a common reference voltage. ### Claim 10 (depends on 1) The apparatus of claim 1, each of the at least one feedback switch being disposed between the corresponding feedback resistance and said terminal of the differential input. ### Claim 11 (depends on 1) The apparatus of claim 1, each feedback switch electrically coupling a terminal of the differential input to a terminal of the corresponding feedback resistance when said feedback switch is closed, each feedback resistance further coupled to a terminal of the at least one output. ### Claim 12 (depends on 1) The apparatus of claim 1, each switch comprising an MOS transistor switch, wherein the ratio between the width-divided-by-length (W/L) of any two MOS transistor switches is substantially equal to the ratio of the corresponding series-coupled resistances to each other. ### Claim 13 A method for configuring an amplifier, the amplifier having differential input terminals and at least one output, the method comprising: selectively closing at least one feedback switch to couple a terminal of the at least one output to a terminal of the differential input via a corresponding series-coupled feedback resistance, a terminal of each feedback switch directly coupled to the terminal of the differential input; and selectively closing at least one input switch to couple a terminal of the differential input to a corresponding series-coupled input resistance, a terminal of each input switch directly coupled to the terminal of the differential input; wherein the ratio between the on-resistances of any two switches is configured to be substantially equal to the ratio of the corresponding series-coupled resistances to each other. ### Claim 14 (depends on 13) The method of claim 13, each switch comprising an MOS transistor with a width-to-length ratio set in inverse proportion to the corresponding resistance. ### Claim 15 (depends on 13) The method of claim 13, the at least one output comprising positive and negative output terminals, the method further comprising: selectively closing a first plurality of feedback switches to couple the negative output terminal to the positive input terminal via a corresponding feedback resistance; and selectively closing a second plurality of feedback switches to couple the positive output terminal to the negative input terminal via a corresponding feedback resistance. ### Claim 16 (depends on 13) The method of claim 13, at least one of the at least one input resistance and the at least one feedback resistance comprising a dummy switch that is always closed. ### Claim 17 (depends on 13) The method of claim 13, the at least one feedback resistance comprising first and second feedback resistances, wherein the ratio between the on-resistances of the feedback switches coupled to the first and second feedback resistances is substantially equal to the ratio between the first and second feedback resistances. ### Claim 18 An apparatus comprising: an amplifier having at least one output and a differential input comprising positive and negative input terminals; means for coupling a terminal of the at least one output to a terminal of the differential input via a corresponding series-coupled feedback resistance; and means for coupling a terminal of the differential input to a corresponding series-coupled input resistance; wherein each of said means is configured to have an on-resistance at a fixed proportion relative to the corresponding series-coupled resistance. ### Claim 19 (depends on 18) The apparatus of claim 18, the means for coupling a terminal of the at least one output to a terminal of the differential input comprising at least one feedback resistance coupled in series with a corresponding feedback switch, each feedback switch coupling a terminal of the at least one output to a terminal of the differential input via a corresponding feedback resistance when said feedback switch is selectively closed. ### Claim 20 (depends on 18) The apparatus of claim 18, the means for coupling a terminal of the differential input to a corresponding series-coupled input resistance comprising at least one input resistance coupled in series with a corresponding input switch, each input switch coupling a terminal of the differential input to a corresponding input resistance, wherein the ratio of the on-resistances of any two switches is set to be substantially equal to the ratio of the corresponding series-coupled resistances to each other.