# US 2013/0154692 A1 · Low-power programmable oscillator and ramp generator

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- Number: US 2013/0154692 A1
- Document ID: US20130154692A1
- Status: Published application
- Kind: A1
- Application number: 13/719,491
- Filed: 2012-12-19
- Published: 2013-06-20
- Earliest claimed: 2011-12-20
- Assignees: Conexant Systems, Inc.
- Inventors: Christian Larsen; Gomathi Komanduru
- Web page: https://patentgrep.com/patent/US20130154692A1

## CPC

- H03K 4/08: having sawtooth shape
- H03K 4/501: the starting point of the flyback period being determined by the amplitude of the voltage across the capacitor, e.g. by a comparator
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

A circuit for generating a signal comprising a first transistor having a drain, a gate and a source. A second transistor having a drain, a source and a gate coupled to the gate of the first transistor to form a current mirror. A current source coupled to the source of the first transistor. A diode-connected transistor having a drain coupled to the source of the second transistor, a source and a gate that forms an output. A variable resistor having a first terminal coupled to the source of diode-connected transistor and a second terminal. A capacitor coupled to the second terminal of the variable resistor.

## Claims

### Claim 1

A generating a signal comprising:
a first transistor having a drain, a gate and a source;
a second transistor having a drain, a source and a oate coupled to the gate of the first transistor to form a current mirror;
a current source coupled to the source of the first transistor;
a diode-connected transistor having a drain coupled to the source of the second transistor, a source and a gate that forms a ramp signal output;
a variable resistor having a first terminal coupled to the source of diode-connected transistor and a second terminal; and
a capacitor coupled to the second terminal of the variable resistor.

### Claim 2 (depends on 1)

The circuit of claim 1 further comprising a comparator receiving the output and a reference voltage and generating a switch control signal.

### Claim 3 (depends on 2)

The circuit of claim 2 further comprising a switch in parallel with the capacitor, wherein the switch receives the switch control signal and operates to discharge the capacitor.

### Claim 4 (depends on 3)

The circuit of claim 3 further comprising a current gain adjust circuit coupled to the output, for adjusting a current gain of an output signal.

### Claim 5 (depends on 4)

The circuit of claim 4 further comprising an offset adjust circuit coupled to the output for adjusting an offset of the output signal.

### Claim 6 (depends on 3)

The circuit of claim 3 further comprising:
a transistor coupled to the ramp signal output;
a current gain adjust controller coupled to the gate of the transistor and configured to adjust a current gain of an output signal.

### Claim 7 (depends on 3)

The circuit of claim 3 further comprising:
a transistor coupled to the ramp signal output; and
an offset adjust controller coupled to the gate of the transistor and configured to adjust an offset of an output signal.

### Claim 8 (depends on 1)

The circuit of claim 1 further comprising:
a transistor controller; and
wherein the first transistor further comprises a plurality of first transistors connected in parallel, the second transistor further comprises a plurality of second transistors connected in parallel, and the transistor controller controls a number of the plurality of first transistors and of the plurality of second transistors that are in a conducting state.

### Claim 9

A method for generating a signal comprising:
applying a current to a capacitor;
comparing a voltage drop across the capacitor with a reference voltage;
discharging the capacitor when the voltage drop across the capacitor equals the reference voltage;
generating a ramp voltage output using the voltage drop across the capacitor; and
generating a clock output using the voltage drop across the capacitor.

### Claim 10 (depends on 9)

The method of claim 9 wherein discharging the capacitor when the voltage drop across the capacitor equals the reference voltage comprises actuating a switch to short the capacitor.

### Claim 11 (depends on 9)

The method of claim 9 further comprising controlling a frequency of oscillation using a variable resistance coupled in series with the capacitor.

### Claim 12 (depends on 9)

The method of claim 9 wherein applying the current to the capacitor comprises:
receiving control data for selecting a frequency of operation; and
modifying a circuit component as a function of the control data.

### Claim 13 (depends on 12)

The method of claim 12 wherein modifying the circuit component as a function of the control data comprises modifying a number of parallel transistors that are in an on state.

### Claim 14 (depends on 12)

The method of claim 12 wherein modifying the circuit component as a function of the control data comprises modifying a variable resistance value.

### Claim 15

A programmable circuit for generating signals comprising:
a relaxation oscillator receiving frequency control data and generating a clock signal having a frequency as a function of the frequency control data; and
a programmable ramp signal generator coupled to the relaxation oscillator receiving ramp signal current data and generating a ramp signal having a current range as a function of the ramp signal current data.

### Claim 16 (depends on 15)

The programmable circuit of claim 15 wherein the relaxation oscillator further comprises a variable resistor, wherein a resistance value of the variable resistor is selected as a function of the frequency control data.

### Claim 17 (depends on 15)

The programmable circuit of claim 15 wherein the relaxation oscillator further comprises a variable transistor, wherein a number of parallel transistors of the variable transistor is selected as a function of the frequency control data.

### Claim 18 (depends on 15)

The programmable circuit of claim 15 wherein the programmable ramp signal generator comprises a variable transistor, wherein a number of parallel transistors of the variable transistor is selected as a function of the ramp signal current data.

### Claim 19 (depends on 15)

The programmable circuit of claim 15 further comprising a programmable ramp signal offset generator coupled to the relaxation oscillator receiving ramp signal offset data and generating a ramp signal having a voltage offset as a function of the ramp signal offset data.