# US 2013/0154590 A1 · Systems and methods for regulating a switching converter

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- Number: US 2013/0154590 A1
- Document ID: US20130154590A1
- Status: Published application
- Kind: A1
- Application number: 13/327,146
- Filed: 2011-12-15
- Published: 2013-06-20
- Earliest claimed: 2011-12-15
- Assignees: Texas Instruments Incorporated
- Inventors: SCOTT E. RAGONA; RENGANG CHEN; David Jauregui
- Web page: https://patentgrep.com/patent/US20130154590A1

## CPC

- H02M 3/1588: {comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence)}
- H02M 1/0009: {Devices or circuits for detecting current in a converter}
- Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS

## Abstract

Systems and methods for regulating a switching converter are disclosed. One embodiment of the present invention relates to a power supply system that comprises a switching converter that provides an output voltage by alternately turning on and off a high-side transistor and a low-side transistor both coupled to an output inductor through a switching node. The switching converter includes a drive circuit that regulates the output voltage based on a feedback signal. The power supply system also comprises a simulated output generator that generates and provides the drive circuit with a simulated inductor waveform as the feedback signal based on a low-side output waveform of the low-side transistor measured at the switching node during off-times of the switching converter.

## Claims

### Claim 1

A power supply system comprising:
a switching converter that provides an output voltage by alternately turning on and off between opposing states a high-side transistor and a low-side transistor both coupled to an output inductor through a switching node, the switching converter including a drive circuit that regulates the output voltage based on a feedback signal; and
a simulated output generator that generates and provides the drive circuit with a simulated inductor waveform as the feedback signal based on a low-side output waveform of the low-side transistor measured at the switching node during off-times of the switching converter.

### Claim 2 (depends on 1)

The system of claim 1, wherein the simulated inductor waveform is a simulated inductor current waveform that is proportional to the actual inductor output current waveform through the output inductor.

### Claim 3 (depends on 2)

The system of claim 2, wherein the simulated output generator employs an amplified, inverted version of the low-side output waveform to determine a high-side portion of the simulated inductor waveform during on-times of the switching converter.

### Claim 4 (depends on 3)

The system of claim 3, wherein the simulated output generator employs the minimum values and slopes of the amplified, inverted version of the low-side output waveform to determine a high-side portion of the simulated inductor waveform during on-times of the switching converter.

### Claim 5 (depends on 1)

The system of claim 1, wherein the simulated output generator comprises:
a first control loop that regulates slopes of the simulated inductor waveform with the amplified, inverted version of the low-side output waveform; and
a second control loop that regulates minimum values of the simulated inductor waveform with the amplified, inverted version of the low-side output waveform.

### Claim 6 (depends on 5)

The system of claim 5, further comprising a charging capacitor that charges to produce on-times of the simulated inductor waveform and discharges to produce off-times of the simulated inductor waveform, wherein the first control loop controls the modulation of the charging of the charging capacitor and the second control loop controls the modulation of the discharging of the charging capacitor.

### Claim 7 (depends on 6)

The system of claim 6, wherein the first control loop comprises a first transconductance amplifier with an output coupled to a first compensation network capacitor and with inputs that receive the simulated inductor waveform and the amplified, inverted version of the low-side output waveform and the second control loop comprises a second transconductance amplifier with an output coupled to a second compensation network capacitor and with inputs that receive sampled minimum values of the simulated inductor waveform and sampled minimum values of the amplified, inverted version of the low-side output waveform.

### Claim 8 (depends on 5)

The system of claim 5, further comprising:
a temperature compensated gain and inverter circuit that receives the low-side output waveform and generates the amplified inverted version of the low-side output waveform; and
a buffer circuit that provides a low impedance transition of the amplified inverted version of the low-side output waveform, the buffer circuit comprising a first level shifter configured to shift up the amplified inverted version of the low-side output waveform such that the signal has a negative voltage rail greater than zero volts to provide for the capture of negative current and a second level shifter that provides the amplified, inverted version of the low-side output waveform and the simulated inductor waveform to the first control loop.

### Claim 9 (depends on 8)

The system of claim 8, further comprising a sample and hold device that samples and provides, to the second control loop, minimum values of the amplified, inverted version of the low-side output waveform and the minimum values of the simulated inductor waveform.

### Claim 10

A simulated output generator for providing a simulated inductor waveform to be employed as a feedback signal to a switching converter that includes a high-side transistor and a low-side transistor both coupled to an output inductor through a switching node, the high-side and low side-transistors alternating between opposing on and off states with the high-side transistor being on during on-times and the low-side transistor being on during off-times, the simulated output generator comprising:
a gain and inverter circuit that receives a low-side output waveform of the low-side transistor measured during off-times and generates an amplified inverted version of the low-side output waveform;
a first control loop that regulates the falling edge slope of the simulated inductor waveform with the amplified, inverted version of the low-side output waveform;
a second control loop that regulates minimum values of the simulated inductor waveform with the amplified, inverted version of the low-side output waveform of the low-side transistor; and
a charging capacitor coupled to outputs of the first and second control loops, the charging capacitor charges to produce on-times of the simulated inductor waveform and discharges to produce off-times of the simulated inductor waveform, wherein the first control loop controls the modulation of the charging of the charging capacitor and the second control loop controls the modulation of the discharging of the charging capacitor.

### Claim 11 (depends on 10)

The generator of claim 10, wherein the simulated inductor waveform is a simulated inductor current waveform that is proportional to the actual inductor output current waveform through the output inductor.

### Claim 12 (depends on 10)

The generator of claim 10, wherein the simulated output generator employs the minimum values and slopes of the amplified, inverted version of the low-side output waveform to determine a high-side portion of the simulated inductor waveform during on-times of the switching converter.

### Claim 13 (depends on 10)

The generator of claim 10, wherein the first control loop comprises a first transconductance amplifier with an output coupled to a first compensation network capacitor and with inputs that receive the simulated inductor waveform and the amplified, inverted version of the low-side output waveform and the second control loop comprises a second transconductance amplifier with an output coupled to a second compensation network capacitor and with inputs that receive sampled minimum values of the simulated inductor waveform and sampled minimum values of the amplified, inverted version of the low-side output waveform.

### Claim 14 (depends on 10)

The generator of claim 10, further comprising a buffer circuit that provides a low impedance transition of the amplified, inverted version of the low-side output waveform, the buffer circuit comprising a first level shifter configured to shift up the amplified inverted version of the low-side output waveform such that the signal has a negative voltage rail greater than zero volts to provide for the capture of negative current and a second level shifter that provides the amplified, inverted version of the low-side output waveform and the simulated inductor waveform to the first control loop.

### Claim 15 (depends on 10)

The generator of claim 10, further comprising a sample and hold device that samples and provides, to the second control loop, minimum values of the amplified inverted version of the low-side output waveform and the minimum values of the simulated inductor waveform.

### Claim 16

A method of regulating a switching converter that includes a high-side transistor and a low-side transistor both coupled to an output inductor through a switching node, the method comprising:
alternating turning on and off the high-side transistor and the low side-transistor between opposing states with the high-side transistor being on during on-times and the low-side transistor being on during off-times;
inverting and amplifying a low-side output waveform of the low-side transistor measured during off-times;
determine a high-side portion of the simulated inductor waveform during on-times based on the low-side output waveform; and
generating a simulated inductor waveform that is proportional to an actual inductor output current through the output inductor based on the low-side output waveform and the determined high-side portion.

### Claim 17 (depends on 16)

The method of claim 16, wherein the simulated inductor waveform is a simulated inductor current waveform.

### Claim 18 (depends on 16)

The method of claim 16, further comprising modulating charging of charging capacitor to produce on-times of the simulated inductor waveform and modulating discharging of the charging capacitor to produce off-times of the simulated inductor waveform.

### Claim 19 (depends on 18)

The method of claim 18, further comprising regulating slopes of the simulated inductor waveform with the amplified, inverted version of the low-side output waveform.

### Claim 20 (depends on 19)

The method of claim 19, further comprising regulating minimum values of the simulated inductor waveform with the amplified, inverted version of the low-side output waveform.
