# US 2013/0154586 A1 · System and method for controlling output ripple of dc-dc converters with leading edge modulation control using current injection

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- Number: US 2013/0154586 A1
- Document ID: US20130154586A1
- Status: Published application
- Kind: A1
- Application number: 13/720,850
- Filed: 2012-12-19
- Published: 2013-06-20
- Earliest claimed: 2011-12-20
- Assignees: Board of Regents, The University of Texas System; Cirasys, Inc.
- Inventors: Robert Jewell Taylor; Louis R. Hunt; Vikas V. Paduvalli
- Web page: https://patentgrep.com/patent/US20130154586A1

## CPC

- G05F 1/468: {characterised by reference voltage circuitry, e.g. soft start, remote shutdown}
- H02M 1/14: Arrangements for reducing ripples from DC input or output
- H02M 3/156: with automatic control of output voltage or current, e.g. switching regulators
- H03K 7/08: Duration or width modulation {; Duty cycle modulation}
- H02M 1/0025: {Arrangements for modifying reference values, feedback values or error values in the control loop of a converter}
- H02M 3/157: with digital control
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

In a preferred embodiment, a voltage converter comprises a voltage converter circuit, an output adjuster and a controller. The controller provides a control signal at a duty ratio determined dynamically by a set of input signals. The dynamic output adjuster determines the set of input signals by adjusting the ac component of an output voltage based on a gain Q. The dynamic output adjuster alleviates dependence on the value of Rc under leading edge modulation in either analog or digital converter systems. In addition to delivering the desired left half plane zero effects, dynamic output adjustment reduces the value of the output ripple. As a result, modern control methods such as input-output linearization can be used to design both boost and buck-boost PWM converters if only left half plane zero effects are present.

## Claims

### Claim 1

A voltage converter for converting an input voltage to an output voltage across a load resistance comprising:
a voltage converter circuit having an inductor;
an output adjuster, connected to the voltage converter circuit, configured to generate an adjusted output voltage based on the output voltage and a time varying component of an inductor current through the inductor, scaled by a first gain factor;
a controller, connected to the output adjuster and the voltage converter circuit, configured to generate a control signal to the voltage converter circuit;
the control signal having a duty ratio based on the adjusted output voltage, the input voltage, a desired output voltage, a second gain factor, the inductor current and the first gain factor; and,
whereby the voltage converter circuit changes the output voltage to match the desired output voltage.

### Claim 2 (depends on 1)

The voltage converter of claim 1 wherein the controller is configured to generate the control signal for leading edge modulation.

### Claim 3 (depends on 1)

The voltage converter of claim 1 wherein the controller is configured to generate the control signal based on input-output feedback linearization of a set of state variables with stable zero dynamics, the set of state variables including the adjusted output voltage.

### Claim 4 (depends on 1)

The voltage converter of claim 1 wherein the adjusted output voltage is a linear function of the time varying component.

### Claim 5 (depends on 1)

The voltage converter of claim 1 wherein the second gain factor includes at least one of the group consisting of a proportional gain, an integral gain and a derivative gain.

### Claim 6 (depends on 1)

The voltage converter of claim 1 wherein the voltage converter circuit comprises a boost converter circuit.

### Claim 7 (depends on 1)

The voltage converter of claim 1 wherein the voltage converter circuit comprises a buck converter circuit.

### Claim 8 (depends on 1)

The voltage converter of claim 1 wherein the voltage converter circuit comprises a buck-boost converter circuit.

### Claim 9 (depends on 1)

The voltage converter of claim 1 wherein the adjusted output voltage is generated according to
y
′
=
y
+
Q
(
x
1
-
y
R
)
,
where y′ is the adjusted output voltage, y is the output voltage, Q is the first gain factor, x1 is the inductor current and R is the load resistance.

### Claim 10 (depends on 9)

The voltage converter of claim 9 wherein the voltage converter circuit comprises:
a boost converter circuit where the inductor is connected to a first polarity of the input voltage in series with a series resistance;
the boost converter circuit further comprising:
a first switch connected in series with the inductor and a second polarity of the input voltage and controlled by the control signal;
a second switch connected between the inductor and a capacitor;
the capacitor connected by a capacitive resistance to the second polarity of the input voltage;
the load resistance connected in parallel to the capacitor and the capacitive resistance; and,
the duty ratio of the control signal is given by the formula:
d
=
[
R

(
R
c
+
Q
)

C
+
L
]

y
′
-
(
L
-
R
s

(
R
c
+
Q
)

C
)

Rx
1
-
R

(
R
c
+
Q
)

Cu
0
+
(
R
+
R
c
)

LCk

(
y
0
′
-
y
′
)
R

(
(
R
c
+
Q
)

Cy
′
-
LR
(
R
+
R
c
)

x
1
)
,
where R is the load resistance, Rc is the capacitive resistance, Q is the first gain factor, k is the second gain factor, C is the capacitance of the capacitor, L is the inductance of the inductor, Rs is the series resistance, u0 is the input voltage, y′ is the adjusted output voltage, x1 is the inductor current,
y
0
′
=
y
0

(
1
+
QD
R

(
1
-
D
)
)
and y0 is the desired output voltage.

### Claim 11 (depends on 10)

The voltage converter of claim 10 wherein the duty ratio of the control signal is given by the formula:
d
=
(
R
2
(
R
-
Q
)

(
R
c
+
Q
)

C
+
L
)

y
′
-
(
L
-
R
s

(
R
c
+
Q
)

C
)

Rx
1
-
R

(
R
c
+
Q
)

Cu
0
+
(
R
+
R
c
)

LCk

(
y
0
′
-
y
′
)
R
(
R
(
R
-
Q
)

(
R
c
+
Q
)

Cy
′
-
L

(
R
-
Q
)
(
R
+
R
c
)

x
1
)
.

### Claim 12 (depends on 10)

The voltage converter of claim 10 wherein the duty ratio of the control signal is given by the formula:

d
=
-
Py
′
-
Sx
1
-
Uu
0
-
k

(
y
′
-
y
0
′
)
V

where

P
=
-
1
R
+
R
c

[
R
2

(
R
c
+
Q
)
L

(
R
-
Q
)
+
1
C
]
,

S
=
R
(
R
+
R
c
)
2
[
(
R
c
+
Q
)
L

(
-
R
s

(
R
+
R
c
)
-
RR
c
)
+
(
R
+
R
c
)
C
+
R
2

(
R
c
+
Q
)
2
L

(
R
-
Q
)
]
,


U
=
R
L

(
R
+
R
c
)

(
R
c
+
Q
)
,


and
V
=
R
(
R
+
R
c
)
2
[

-
(
R

(
R
c
+
Q
)

Q

(
R
+
R
c
)
L

(
R
-
Q
)
+
(
R
-
Q
)
C
)

x
1
+
R

(
R
c
+
Q
)

(
R
+
R
c
)
L

(
R
-
Q
)

y
′
]
.

### Claim 13 (depends on 9)

The voltage converter of claim 9 wherein the voltage converter circuit comprises:
a buck converter circuit further comprising:
a first switch connected in series with a first polarity of the input voltage and controlled by the control signal;
the inductor having a series resistance connected in series with the first switch and a second polarity of the input voltage;
a second switch connected between the first switch and a capacitor;
the capacitor connected by a capacitive resistance to the second polarity of the input voltage;
the load resistance connected in parallel to the capacitor and the capacitive resistance; and,
the duty ratio of the control signal is given by the formula:
d
=
(
R

(
R
c
+
Q
)

C
+
L
)

y
′
-
(
L
-
R
s

(
R
c
+
Q
)

C
)

Rx
1
+
(
R
+
R
c
)

LCk

(
y
0
′
-
y
′
)
]
R

(
R
c
+
Q
)

Cu
0
.
where R is the load resistance, Rc is the capacitive resistance, Q is the first gain factor, k is the second gain factor, C is the capacitance of the capacitor, L is the inductance of the inductor, Rs is the series resistance, u0 is the input voltage, y′ is the adjusted output voltage, x1 is the inductor current, and y′0 is equal to the desired output voltage.

### Claim 14 (depends on 13)

The voltage converter of claim 13 wherein the duty ratio of the control signal is given by the formula:
d
=
(
R
2
(
R
-
Q
)

(
R
c
+
Q
)

C
+
L
)

y
′
-
(
L
-
R
s

(
R
c
+
Q
)

C
)

Rx
1
+
(
R
+
R
c
)

LCk

(
y
0
′
-
y
′
)
R

(
R
c
+
Q
)

Cu
0
.

### Claim 15 (depends on 13)

The voltage converter of claim 13 wherein the duty ratio of the control signal is given by the formula:

d
=
-
Py
′
-
Sx
1
-
Uu
0
-
k

(
y
′
-
y
0
′
)
V

where

P
=
-
1
R
+
R
c
[
R
2

(
R
c
+
Q
)
L

(
R
-
Q
)
+
1
C
]
,

S
=
R
(
R
+
R
c
)
2
[
(
R
c
+
Q
)
L

(
-
R
s

(
R
+
R
c
)
-
RR
c
)
+
(
R
+
R
c
)
C
+
R
2

(
R
c
+
Q
)
2
L

(
R
-
Q
)
]
,


U
=
0
,


and

V
=
R

(
R
c
+
Q
)

u
0
L

(
R
+
R
c
)
.

### Claim 16 (depends on 1)

The voltage converter of claim 1 wherein:
the voltage converter circuit further comprises a capacitor having a capacitive resistance and connected in parallel to the load resistance; and,
the adjusted output voltage is generated according to
y
′
=
y
+
R
(
R
+
R
c
)

Q
(
x
1
-
y
R
)
,
where y′ is the adjusted output voltage, y is the output voltage, Q is the first gain factor, x1 is the inductor current, R is the load resistance and Rc is the capacitive resistance.

### Claim 17 (depends on 1)

The voltage converter of claim 1 wherein the adjusted output voltage is generated according to
y
′
=
y
+
Q
(
x
1
+
y
R
)
,
where y′ is the adjusted output voltage, y is the output voltage, Q is the first gain factor, x1 is the inductor current and R is the load resistance.

### Claim 18 (depends on 17)

The voltage converter of claim 17 wherein the voltage converter circuit comprises:
a buck-boost converter circuit further comprising:
a first switch connected in series with a first polarity of the input voltage and controlled by the control signal;
the inductor having a series resistance connected in series with the first switch and
a second polarity of the input voltage;
a second switch connected between the first switch and a capacitor;
the capacitor connected by a capacitive resistance to the second polarity of the input voltage;
the load resistance connected in parallel to the capacitor and the capacitive resistance; and,
the duty ratio of the control signal is given by the formula:
d
=
(
R

(
R
c
+
Q
)

C
+
L
)

y
′
+
(
L
-
R
s

(
R
c
+
Q
)

C
)

Rx
1
+
(
R
+
R
c
)

LCk

(
y
0
′
-
y
′
)
]
R
(
(
R
c
+
Q
)

Cy
′
+
LR
(
R
+
R
c
)

x
1
-
(
R
c
+
Q
)

Cu
0
)
.
where R is the load resistance, Rc is the capacitive resistance, Q is the first gain factor, k is the second gain factor, C is the capacitance of the capacitor, L is the inductance of the inductor, Rs is the series resistance, u0 is the input voltage, y′ is the adjusted output voltage, x1 is the inductor current,
y
0
′
=
y
0
(
1
-
QD
R

(
1
-
D
)
)
and y0 is the desired output voltage.

### Claim 19 (depends on 18)

The voltage converter of claim 18 wherein the duty ratio of the control signal is given by the formula:
d
=
(
R
2
(
R
-
Q
)

(
R
c
+
Q
)

C
+
L
)

y
′
+
(
L
-
R
s

(
R
c
+
Q
)

C
)

Rx
1
+
(
R
+
R
c
)

LCk

(
y
0
′
-
y
′
)
R
[
R
(
R
-
Q
)

(
R
c
+
Q
)

Cy
′
+
L

(
R
-
Q
)
(
R
+
R
c
)

x
1
-
(
R
+
R
c
)

Cu
0
]
.

### Claim 20 (depends on 18)

The voltage converter of claim 18 wherein the duty ratio of the control signal is given by the formula:

d
=
-
Py
′
-
Sx
1
-
Uu
0
-
k

(
y
′
-
y
0
′
)
V

where

P
=
-
1
R
+
R
c

[
R
2

(
R
c
+
Q
)
L

(
R
-
Q
)
+
1
C
]
,


S
=
R
(
R
+
R
c
)
[
(
R
c
+
Q
)
L

(
R
s
+
RR
c
(
R
+
R
c
)
-
1
C
-
R
2

(
R
c
+
Q
)
2
L

(
R
+
R
c
)

(
R
-
Q
)
]
,


U
=
0
,
and
V
=
-
R

(
R
c
+
Q
)
(
R
+
R
c
)
[
R
L

(
-
1
(
R
-
Q
)

y
′
-
(
R
+
R
c
)

Q
(
R
-
Q
)

x
1
)
+
u
0
L
]
+
(
R
-
Q
)

R
C

(
R
+
R
c
)
2

x
1
.

### Claim 21

A method of converting an input voltage into an output voltage across a load resistance comprising:
providing a voltage converter circuit having the input voltage as a voltage source and producing the output voltage;
providing an inductor current flowing through an inductor in the voltage converter circuit, the inductor current having a time varying component;
providing an output adjuster connected to the voltage converter circuit;
generating an adjusted output voltage which depends on the output voltage and the time varying component of the inductor current scaled by a first gain factor;
providing a controller connected to the output adjuster and to the voltage converter circuit;
generating a control signal with a duty ratio that controls the voltage converter circuit;
dynamically determining the duty ratio from the adjusted output voltage, the input voltage, a desired output voltage, a second gain factor, the inductor current and the first gain factor; and,
whereby the voltage converter circuit produces the output voltage to match the desired output voltage.

### Claim 22 (depends on 22)

The method of claim 22 further comprising:
generating the control signal based on a leading edge modulation of the voltage converter circuit.

### Claim 23 (depends on 22)

The method of claim 22 further comprising:
generating the control signal based on an input-output feedback linearization of a set of state variables with stable zero dynamics, where the set of state variables includes the adjusted output voltage.

### Claim 24 (depends on 22)

The method of claim 22 further comprising:
determining the adjusted output voltage to be a linear function of the time varying component.

### Claim 25 (depends on 22)

The method of claim 22 further comprising:
generating the adjusted output voltage according to
y
′
=
y
+
Q

(
x
1
-
y
R
)
,
where y′ is the adjusted output voltage, y is the output voltage, Q is the first gain factor, x1 is the inductor current and R is the load resistance.

### Claim 26 (depends on 22)

The method of claim 22 further comprising:
generating the adjusted output voltage according to
y
′
=
y
+
Q

(
x
1
+
y
R
)
,
where y′ is the adjusted output voltage, y is the output voltage, Q is the first gain factor, x1 is the inductor current and R is the load resistance.

### Claim 27 (depends on 22)

The method of claim 22 further comprising:
generating the adjusted output voltage according to
y
′
=
y
+
R
(
R
+
R
c
)

Q

(
x
1
-
y
R
)
,
where y′ is the adjusted output voltage, y is the output voltage, Q is the first gain factor, x1 is the inductor current, R is the load resistance and Rc is a capacitive resistance of a capacitor in parallel with the load resistance.

### Claim 28 (depends on 22)

The method of claim 22 further comprising:
generating the adjusted output voltage according to
y
′
=
y
+
R
(
R
+
R
c
)

Q

(
x
1
+
y
R
)
,
where y′ is the adjusted output voltage, y is the output voltage, Q is the first gain factor, x1 is the inductor current, R is the load resistance and Rc is a capacitive resistance of a capacitor in parallel with the load resistance.

### Claim 29 (depends on 22)

The method of claim 22 further comprising:
dynamically determining the second gain factor from at least one of the group consisting of a proportional gain, an integral gain and a derivative gain.

### Claim 30 (depends on 22)

The method of claim 22 further providing a boost converter circuit for the voltage converter circuit.

### Claim 31 (depends on 22)

The method of claim 22 further providing a buck-boost converter circuit for the voltage converter circuit.

### Claim 32 (depends on 22)

The method of claim 22 further providing a buck converter circuit for the voltage converter circuit.

### Claim 33 (depends on 22)

The method of claim 22 further comprising controlling the voltage converter circuit to produce the adjusted output voltage to match an adjusted desired output voltage.

### Claim 34 (depends on 22)

The method of claim 22 further comprising:
measuring a set of circuit parameters for the voltage converter circuit;
determining the first gain based on the set of circuit parameters;
determining the second gain;
repeatedly applying the control signal with the duty ratio to the voltage converter circuit;
repeatedly measuring the set of circuit parameters;
repeatedly adjusting the duty ratio based on the set of circuit parameters; and,
stopping the method if a directive to stop the controller is received.

### Claim 35 (depends on 35)

The method of claim 35 further comprising adjusting the first gain.