# US 2013/0154103 A1 · Semiconductor package having multi pitch ball land

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- Number: US 2013/0154103 A1
- Document ID: US20130154103A1
- Status: Published application
- Kind: A1
- Application number: 13/767,144
- Filed: 2013-02-14
- Published: 2013-06-20
- Earliest claimed: 2009-11-19
- Assignees: Samsung Electronics Co., Ltd.
- Inventors: Tong-Suk KIM; Heung-Kyu KWON; Jeong-Oh HA; Hyun-A KIM
- Web page: https://patentgrep.com/patent/US20130154103A1

## CPC

- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 90/00: Package configurations
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 72/5522: {comprising gold [Au]}
- H10W 72/5524: {comprising aluminium [Al]}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 90/22: the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device having a printed circuit board and a semiconductor chip. The printed circuit board includes a chip region, a plurality of first ball lands adjacent to the chip region, and at least one second ball land adjacent to the first ball lands. The semiconductor chip is mounted on the chip region. The first ball lands are arranged to have a first pitch. One of the first ball lands which is nearest to the second ball land, and the second ball land have a second pitch greater than the first pitch.

## Claims

### Claim 1

A semiconductor device, comprising:
a first printed circuit board including a chip region defined by at least a first boundary and a second boundary, a plurality of first lands arranged in a straight line outside the chip region, and at least one second land adjacent to the intersection of the first boundary and the second boundary; and
a first semiconductor chip on the chip region,
wherein the plurality of first lands are arranged to have a first pitch, and
wherein the second land and one of the plurality of first lands which is nearest to the second land have a second pitch that is greater than the first pitch.

### Claim 2 (depends on 1)

The device of claim 1, wherein the second pitch is up to twice as great as the first pitch.

### Claim 3 (depends on 1)

The device of claim 1, wherein the plurality of first lands are arranged parallel to the first boundary.

### Claim 4 (depends on 1)

The device of claim 1, wherein the second land is arranged on an extension line of the straight line.

### Claim 5 (depends on 1)

The device of claim 1, further comprising:
a second semiconductor chip on the first semiconductor chip; and
conductive patterns between the second semiconductor chip and the first and second lands,
wherein the second semiconductor chip is electrically connected to the first and second lands via the conductive patterns.

### Claim 6 (depends on 1)

The device of claim 1, further comprising:
a second printed circuit board between the second semiconductor chip and the conductive patterns, wherein the second printed circuit board includes other lands corresponding to the first and second lands.

### Claim 7

A printed circuit board (PCB), comprising:
a chip region defined by at least a first boundary and a second boundary;
a plurality of first lands arranged in a straight line outside the chip region; and
at least one second land adjacent to the intersection of the first boundary and the second boundary,
wherein the plurality of first lands are arranged to have a first pitch, and
wherein the second land and one of the plurality of first lands which is nearest to the second land have a second pitch that is greater than the first pitch.

### Claim 8 (depends on 7)

The PCB of claim 7, wherein the second pitch is up to twice as great as the first pitch.

### Claim 9 (depends on 7)

The PCB of claim 7, wherein the second land is arranged on an extension line of the straight line.

### Claim 10 (depends on 7)

The PCB of claim 7, wherein the chip region is further defined by a third boundary and a fourth boundary, the first and third boundaries parallel with one another, and the second and fourth boundaries parallel with one another.

### Claim 11 (depends on 10)

The PCB of claim 10, wherein at least another second land is disposed adjacent to at least one of the intersection of the second and third boundaries, the third and fourth boundaries, and the first and fourth boundaries.