# US 2013/0154088 A1 · Integrated Circuits with Components on Both Sides of a Selected Substrate and Methods of Fabrication

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- Number: US 2013/0154088 A1
- Document ID: US20130154088A1
- Status: Published application
- Kind: A1
- Application number: 13/528,832
- Filed: 2012-06-20
- Published: 2013-06-20
- Earliest claimed: 2011-06-22
- Assignees: pSemi Corporation
- Inventors: James S. Cable; Anthony Mark Miscione; Ronald Eugene Reedy
- Web page: https://patentgrep.com/patent/US20130154088A1

## CPC

- H10D 86/201: {the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence)}
- H10D 88/101: {comprising components on opposite major surfaces of semiconductor substrates}
- H10P 54/00: Cutting or separating of wafers, substrates or parts of devices
- H10W 70/63: Vias, e.g. via plugs
- H10W 72/01204: {using temporary auxiliary members, e.g. using sacrificial coatings or handle substrates}
- H10W 72/0198: {batch processes}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/879: {Bump connectors and bond wires}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Novel integrated circuits (SOI ICs), and methods for making and mounting the ICs are disclosed. In one embodiment, an IC comprises a first circuit layer of the IC formed from an active layer of an SOI wafer. The first circuit layer is coupled to a first surface of buffer layer, and a second surface of the buffer layer is coupled to a selected substrate comprising an insulating material. The selected substrate may be selected, without limitation, from the following types: sapphire, quartz, silicon dioxide glass, piezoelectric materials, and ceramics. A second circuit layer of the IC are formed, coupled to a second surface of the selected substrate. In one embodiment of a mounted IC, the first circuit layer is coupled to contact pads on a package substrate via solder bumps or copper pillars. The second circuit layer is coupled to contact pads on the package substrate via wire bonds.

## Claims

### Claim 1

A method for forming integrated circuits (ICs) comprising a first circuit layer and a second circuit layer, comprising:
a) forming the first circuit layer from an active layer of a silicon-on-insulator (SOI) wafer, wherein the SOI wafer comprises the active layer, a buffer layer coupled to the active layer, and a silicon substrate coupled to the buffer layer;
b) removing the silicon substrate from the buffer layer;
c) coupling the buffer layer to a first surface of a selected substrate; and,
d) forming the second circuit layer on a second surface of the selected substrate.

### Claim 2 (depends on 1)

The method of claim 1, wherein the selected substrate comprises a material selected from the following types of materials: sapphire, quartz, silicon dioxide glass, aluminum nitride, hot-pressed silicon carbide, sintered silicon carbide, CVD silicon carbide, and alumina.

### Claim 3 (depends on 1)

The method of claim 1, wherein the selected substrate comprises sapphire, and wherein the second circuit layer comprises passive components.

### Claim 4 (depends on 1)

The method of claim 1, wherein the selected substrate comprises a piezoelectric material, and wherein the second circuit layer comprises acoustic wave components.

### Claim 5 (depends on 1)

The method of claim 1, further comprising a thinning the selected substrate, wherein the thinning the selected substrate is performed subsequent to the coupling the buffer layer to a first surface of a selected substrate, and prior to the forming the second circuit layer on a second surface of the selected substrate.

### Claim 6 (depends on 1)

The method of claim 1, further comprising:
a) forming contact elements coupled to the first circuit layer; and,
b) separating the ICs into dies, each die comprising an IC.

### Claim 7

A method for forming integrated circuits (ICs) comprising a first circuit layer and a second circuit layer, comprising:
a) forming the first circuit layer from an active layer of a silicon-on-insulator (SOI) wafer, wherein the SOI wafer comprises the active layer, a buffer layer coupled to the active layer, and a silicon substrate coupled to the buffer layer;
b) removing the silicon substrate from the buffer layer;
c) forming the second circuit layer on a second surface of the selected substrate; and,
d) coupling the buffer layer to a first surface of a selected substrate.

### Claim 8 (depends on 7)

The method of claim 7, wherein the selected substrate comprises a material selected from the following types of materials: sapphire, quartz, silicon dioxide glass, aluminum nitride, hot-pressed silicon carbide ceramic, sintered silicon carbide ceramic, CVD silicon carbide, and alumina.

### Claim 9 (depends on 7)

The method of claim 7, wherein the selected substrate comprises sapphire, and wherein the second circuit layer comprises passive components.

### Claim 10 (depends on 7)

The method of claim 7, wherein the selected substrate comprises a piezoelectric material, and wherein the second circuit layer comprises acoustic wave components.

### Claim 11 (depends on 7)

The method of claim 7, further comprising a thinning the selected substrate, wherein the thinning the selected substrate is performed subsequent to the forming the second circuit layer on a second surface of the selected substrate, and prior to the coupling the buffer layer to a first surface of a selected substrate.

### Claim 12 (depends on 7)

The method of claim 7, further comprising:
a) forming contact elements coupled to the first circuit layer; and,
b) separating the ICs into dies, each die comprising an IC.

### Claim 13

A method for forming integrated circuits (ICs) comprising a first circuit layer and a second circuit layer, comprising:
a) forming the first circuit layer from an active layer of a silicon-on-insulator (SOI) wafer, wherein the SOI wafer comprises the active layer, a buffer layer coupled to the active layer, and a silicon substrate coupled to the buffer layer;
b) removing the silicon substrate from the buffer layer;
c) forming the second circuit layer on a second substrate;
d) separating the second circuit layer from the second substrate;
e) coupling the buffer layer to a first surface of a selected substrate; and,
f) coupling the second circuit layer to a second surface of the selected substrate.

### Claim 14 (depends on 13)

The method of claim 13, wherein the selected substrate comprises a material selected from the following types of materials: sapphire, quartz, silicon dioxide glass, aluminum nitride, hot-pressed silicon carbide ceramic, sintered silicon carbide ceramic, CVD silicon carbide, and alumina.

### Claim 15 (depends on 13)

The method of claim 13, wherein the second substrate is selected from the following: an SOI substrate, a silicon substrate having an insulating top layer, and a piezoelectric substrate.

### Claim 16 (depends on 15)

The method of claim 15, wherein the insulating top layer comprises silicon dioxide.

### Claim 17 (depends on 13)

The method of claim 13, wherein the second circuit layer comprises at least one of the following types of components: active components, passive components, opto-electronic components, microelectromechanical components, and acoustic wave components.

### Claim 18 (depends on 13)

The method of claim 13, further comprising a thinning the selected substrate, wherein the thinning the selected substrate is performed subsequent to the coupling the buffer layer to a first surface of a selected substrate, and prior to the coupling the second circuit layer to a second surface of the selected substrate.

### Claim 19 (depends on 13)

The method of claim 13, further comprising:
a) forming contact elements coupled to the first circuit layer; and,
b) separating the ICs into dies, each die comprising an IC.

### Claim 20

A method for forming integrated circuits (ICs) comprising a first circuit layer and a second circuit layer, comprising:
a) forming the first circuit layer from an active layer of a silicon-on-insulator (SOI) wafer, wherein the SOI wafer comprises the active layer, a buffer layer coupled to the active layer, and a silicon substrate coupled to the buffer layer;
b) removing the silicon substrate from the buffer layer;
c) forming the second circuit layer on a second substrate;
d) separating the second circuit layer from the second substrate;
e) coupling the second circuit layer to a second surface of the selected substrate; and,
f) coupling the buffer layer to a first surface of a selected substrate.

### Claim 21 (depends on 20)

The method of claim 20, wherein the selected substrate comprises a material selected from the following types of materials: sapphire, quartz, silicon dioxide glass, aluminum nitride, hot-pressed silicon carbide ceramic, sintered silicon carbide ceramic, CVD silicon carbide, and alumina.

### Claim 22 (depends on 20)

The method of claim 20, wherein the second substrate is selected from the following: an SOI substrate, a silicon substrate having an insulating top layer, and a piezoelectric substrate.

### Claim 23 (depends on 22)

The method of claim 22, wherein the insulating top layer comprises silicon dioxide.

### Claim 24 (depends on 20)

The method of claim 20, wherein the second circuit layer comprises at least one of the following types of components: active components, passive components, electro-optic components, microelectromechanical components, and acoustic wave components.

### Claim 25 (depends on 20)

The method of claim 20, further comprising a thinning the selected substrate, wherein the thinning the selected substrate is performed subsequent to the coupling the second circuit layer to a second surface of the selected substrate, and prior to the coupling the buffer layer to a first surface of a selected substrate.

### Claim 26 (depends on 20)

The method of claim 20, further comprising:
a) forming contact elements coupled to the first circuit layer; and,
b) separating the ICs into dies, each die comprising an IC.

### Claim 27

A method for forming integrated circuits (ICs) comprising a first circuit layer and a second circuit layer, comprising:
a) forming the first circuit layer on a first substrate;
b) separating the first circuit layer from the first substrate;
c) coupling the first circuit layer to a first surface of a selected substrate; and,
d) forming the second circuit layer on a second surface of the selected substrate.

### Claim 28 (depends on 27)

The method of claim 27 wherein the first substrate comprises a silicon substrate, and wherein the STEP of separating the first circuit layer from the first substrate comprises a process of thinning the silicon substrate.

### Claim 29 (depends on 27)

The method of claim 27, wherein the selected substrate comprises a material selected from the following types of materials: sapphire, quartz, silicon dioxide glass, aluminum nitride, hot-pressed silicon carbide ceramic, sintered silicon carbide ceramic, CVD silicon carbide, and alumina.

### Claim 30 (depends on 27)

The method of claim 27, wherein the forming second circuit layer on a second surface of the selected substrate is performed prior to the coupling the first circuit layer to a first surface of a selected substrate.

### Claim 31

A method for forming integrated circuits (ICs) comprising a first circuit layer and a second circuit layer, comprising:
a) forming the first circuit layer on a first substrate;
b) separating the first circuit layer from the first substrate;
c) forming the second circuit layer on a second substrate;
d) separating the second circuit layer from the second substrate;
e) coupling the first circuit layer to a first surface of a selected substrate; and,
f) coupling the second circuit layer to a second surface of the selected substrate.

### Claim 32 (depends on 31)

The method of claim 31 wherein the first substrate comprises a silicon substrate, and wherein the separating the first circuit layer from the first substrate comprises a process of thinning the silicon substrate.

### Claim 33 (depends on 31)

The method of claim 31 wherein the first substrate comprises a silicon-on-insulator (SOI) substrate.

### Claim 34 (depends on 31)

The method of claim 31, wherein the second substrate is selected from the following: an SOI substrate, a silicon substrate having an insulating top layer, and a piezoelectric substrate.

### Claim 35 (depends on 31)

The method of claim 31, wherein the selected substrate comprises a material selected from the following types of materials: sapphire, quartz, silicon dioxide glass, aluminum nitride, hot-pressed silicon carbide ceramic, sintered silicon carbide ceramic, CVD silicon carbide, and alumina.

### Claim 36 (depends on 31)

The method of claim 31, wherein the coupling the second circuit layer to a second surface of the selected substrate is performed prior to the coupling the first circuit layer to a first surface of a selected substrate.

### Claim 37

A method for forming integrated circuits (ICs) comprising a first circuit layer and a second circuit layer, comprising:
a) forming the first circuit layer from an active layer of a silicon-on-sapphire (SOS) wafer, wherein the SOS wafer comprises the active layer and a sapphire substrate, and wherein the active layer is coupled to a first surface of the sapphire substrate; and,
b) forming the second circuit layer on a second surface of the sapphire substrate.

### Claim 38

An integrated circuit (IC), comprising:
a) a first circuit layer, coupled to a first surface of a selected substrate; and,
b) a second circuit layer, coupled to a second surface of the selected substrate.

### Claim 39 (depends on 38)

The IC of claim 38, wherein the selected substrate comprises a material selected from the following types of materials: sapphire, quartz, silicon dioxide glass, aluminum nitride, hot-pressed silicon carbide ceramic, sintered silicon carbide ceramic, CVD silicon carbide, and alumina.

### Claim 40 (depends on 38)

The IC of claim 38, wherein the second circuit layer comprises at least one of the following types of components: active components, passive components, electro-optic components, microelectromechanical components, and acoustic wave components.

### Claim 41 (depends on 38)

The IC of claim 38, further comprising:
a) contact elements operably coupled to the first circuit layer; and,
b) contacts operably coupled to the second circuit layer.

### Claim 42 (depends on 41)

The IC of claim 41, wherein the contact elements operably coupled to the first circuit layer are selected from the following types of contact elements: solder bumps and copper pillars.

### Claim 43 (depends on 42)

The IC of claim 42, wherein the contact elements operably coupled to the first circuit layer are operably coupled to first contacts of a package substrate by means of flip-chip mounting; and wherein the contacts operably coupled to the second circuit layer are operably coupled to second contacts of the package substrate by means of wire bonds; and wherein the first contacts of the package substrate and operably coupled to the second contacts of the package substrate by means of interconnects on the package substrate.

### Claim 44 (depends on 38)

The IC of claim 38, wherein the first circuit layer comprises at least one of the following, an RF power amplifier circuit and an RF switch circuit, and wherein the second circuit layer comprises at least one of the following, an impedance matching circuit and an RF filter circuit.

### Claim 45

An integrated circuit (IC), comprising:
a) a first circuit layer, formed on an active layer of an SOI substrate;
b) a buffer layer, wherein a first surface of the buffer layer is coupled to the active layer of the SOI substrate;
c) a selected substrate, wherein a first surface of the selected substrate is coupled to a second surface of the buffer layer; and,
d) a second circuit layer coupled to a second surface of the selected substrate.

### Claim 46 (depends on 45)

The IC of claim 45, wherein the selected substrate comprises a material selected from the following types of materials: sapphire, quartz, silicon dioxide glass, aluminum nitride, hot-pressed silicon carbide ceramic, sintered silicon carbide ceramic, CVD silicon carbide, and alumina.

### Claim 47 (depends on 45)

The IC of claim 45, wherein the second circuit layer comprises at least one of the following types of components: active components, passive components, electro-optic components, microelectromechanical components, and acoustic wave components.

### Claim 48 (depends on 45)

The IC of claim 45, further comprising:
a) contact elements operably coupled to the first circuit layer; and,
b) contacts operably coupled to the second circuit layer.

### Claim 49 (depends on 48)

The IC of claim 48, wherein the contact elements operably coupled to the first circuit layer are selected from the following types of contact elements: solder bumps and copper pillars.

### Claim 50 (depends on 49)

The IC of claim 49, wherein the contact elements operably coupled to the first circuit layer are operably coupled to first contacts of a package substrate by means of flip-chip mounting; and wherein the contacts operably coupled to the second circuit layer are operably coupled to second contacts of the package substrate by means of wire bonds; and wherein the first contacts of the package substrate are operably coupled to the second contacts of the package substrate by means of interconnects on the package substrate.

### Claim 51 (depends on 45)

The IC of claim 45, wherein the first circuit layer comprises at least one of the following, an RF power amplifier circuit and an RF switch circuit, and wherein the second circuit layer comprises at least one of the following, an impedance matching circuit and an RF filter circuit.