# US 2013/0154082 A1 · Semiconductor device, semiconductor device manufacturing method, and electronic device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0154082 A1 - Document ID: US20130154082A1 - Status: Published application - Kind: A1 - Application number: 13/648,397 - Filed: 2012-10-10 - Published: 2013-06-20 - Earliest claimed: 2011-12-16 - Assignees: Fujitsu Limited - Inventors: Junichi KON - Web page: https://patentgrep.com/patent/US20130154082A1 ## CPC - H10W 40/10: Arrangements for heating - H10W 42/00: Arrangements for protection of devices (arrangements for thermal protection H10W40/00) - H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs - H10W 70/614: {the multiple chips being integrally enclosed} - H10W 90/00: Package configurations - H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 72/0198: {batch processes} - H10W 72/241: {Dispositions, e.g. layouts} - H10W 72/874: {On different surfaces} - H10W 72/9413: {on encapsulations} - H10W 74/014: {using batch processing} - H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)} - H10W 74/111: {the semiconductor body being completely enclosed} - H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body} - H10W 90/10: Configurations of laterally-adjacent chips - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor device includes an insulation layer, a first semiconductor element and a second semiconductor element which are disposed within the insulation layer, a frame which has higher thermal conductivity than the insulation layer and surrounds the first semiconductor element and the second semiconductor element via the insulation layer, and a wiring layer which is disposed over the insulation layer and includes an electrode which electrically connects the first semiconductor element and the second semiconductor element. ## Claims ### Claim 1 A semiconductor device, comprising: an insulation layer; a first semiconductor element and a second semiconductor element which are disposed within the insulation layer; a frame that has higher thermal conductivity than the insulation layer and surrounds the first semiconductor element and the second semiconductor element via the insulation layer; and a wiring layer that is disposed over the insulation layer and includes an electrode which electrically connects the first semiconductor element and the second semiconductor element. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the insulation layer made of resin, wherein the first semiconductor element and the second semiconductor element have a first electrode pad and a second electrode pad which are exposed from the insulation layer, respectively, and wherein the electrode is electrically connected to the first electrode pad and the second electrode pad. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the wiring layer includes a frame portion which surrounds an area including the electrode and are connected to the frame. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, further comprising: a layer which is disposed on a side face opposite of a side face where the wiring layer of the insulation layer is disposed, has higher thermal conductivity than the insulation layer and is connected to the frame. ### Claim 5 (depends on 4) The semiconductor device according to claim 4, wherein the layer is in contact with at least one of the first semiconductor element and the second semiconductor element. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein distance between the first semiconductor element and the second semiconductor element, and the frame is equal to distance between the first semiconductor element and the second semiconductor element. ### Claim 7 A semiconductor device manufacturing method, comprising: forming a substrate including an insulation layer, a first semiconductor element and a second semiconductor element which are disposed within a first area of the insulation layer, and a first frame which is disposed within the insulation layer, has higher thermal conductivity than the insulation layer and surrounds the first semiconductor element and the second semiconductor element via the insulation layer of the first area; forming a wiring layer including a first electrode which is electrically connected to the first semiconductor element and the second semiconductor element over the substrate; and cutting the wiring layer and the substrate so that the insulation layer of the first area is surrounded with at least a portion of the first frame. ### Claim 8 (depends on 7) The semiconductor device manufacturing method according to claim 7, wherein the substrate to be formed further includes a third semiconductor element and a fourth semiconductor element which are disposed within a second area of the insulation layer, and a second frame which is disposed within the insulation layer, has higher thermal conductivity than the insulation layer and surrounds the third semiconductor element and the fourth semiconductor element via the insulation layer of the second area, wherein the wiring layer to be formed further includes a second electrode electrically connected to the third semiconductor element and the fourth semiconductor element, and wherein the process arranged to cut the wiring layer and the substrate includes cutting the wiring layer and the substrate so that, with a position between the first frame and the second frame, the insulation layer of the first area is surrounded with at least a portion of the first frame, and also the insulation layer of the second area is surrounded with at least a portion of the second frame. ### Claim 9 (depends on 8) The semiconductor device manufacturing method according to claim 8, wherein the forming of the substrate includes disposing the first frame and the second frame over a support member, disposing the first semiconductor element and the second semiconductor element within the first frame, disposing the third semiconductor element and the fourth semiconductor element within the second frame, forming the insulation layer over the support member, and to embed the first frame and the second frame, and the first semiconductor element, the second semiconductor element, the third semiconductor element, and the fourth semiconductor element in the insulation layer, and peeling the support member from the insulation layer. ### Claim 10 (depends on 9) The semiconductor device manufacturing method according to claim 9, wherein the forming of the substrate includes a process arranged to extend and dispose a third frame so as to pass through between the first frame and the second frame over the support member. ### Claim 11 (depends on 9) The semiconductor device manufacturing method according to claim 9, wherein the forming of the substrate includes a process arranged to extend and dispose a fourth frame so as to surround an area including the first frame and the second frame over the support member. ### Claim 12 (depends on 9) The semiconductor device manufacturing method according to claim 9, wherein the first frame and the second frame are integrated. ### Claim 13 (depends on 8) The semiconductor device manufacturing method according to claim 8, wherein the first semiconductor element and the second semiconductor element have a first electrode pad and a second electrode pad which are exposed from the insulation layer, respectively, wherein the first electrode is electrically connected to the first electrode pad and the second electrode pad, wherein the third semiconductor element and the fourth semiconductor element have a third electrode pad and a fourth electrode pad which are exposed from the insulation layer, respectively, and wherein the second electrode is electrically connected to the third electrode pad and the fourth electrode pad. ### Claim 14 (depends on 8) The semiconductor device manufacturing method according to claim 8, wherein the forming of the wiring layer includes forming a first frame portion which surrounds an area including the first electrode and is connected to the first frame, and a second frame portion which surrounds an area including the second electrode and is connected to the second frame. ### Claim 15 (depends on 8) The semiconductor device manufacturing method according to claim 8, further comprising: a process, performed after the process to form the substrate, arranged to form a layer on a face side opposite of a forming face of the wiring layer of the insulation layer which has higher thermal conductivity than the insulation layer and is connected to the first frame and the second layer. ### Claim 16 A substrate, comprising: an insulation layer; a first semiconductor element and a second semiconductor element which are disposed within a first area of the insulation layer; a first frame which is disposed within the insulation layer, has higher thermal conductivity than the insulation layer and surrounds the first semiconductor element and the second semiconductor element via the insulation layer of the first area; a third semiconductor element and a fourth semiconductor element which are disposed within a second area of the insulation layer; and a second frame which is disposed within the insulation layer, has higher thermal conductivity than the insulation layer and surrounds the third semiconductor element and the fourth semiconductor element via the insulation layer of the second area. ### Claim 17 (depends on 16) The substrate according to claim 16, further comprising: a third frame which is disposed within the insulation layer and is extended passing through between the first frame and the second frame. ### Claim 18 (depends on 16) The substrate according to claim 16, further comprising: a fourth frame which is disposed within the insulation layer and is extended so as to surround an area including the first frame and the second frame. ### Claim 19 (depends on 16) The substrate according to claim 16, wherein the insulation layer made of resin, and wherein the first frame and the second frame are integrated.