# US 2013/0154079 A1 · Integrated circuit packaging system with substrate mold gate and method of manufacture thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0154079 A1 - Document ID: US20130154079A1 - Status: Published application - Kind: A1 - Application number: 13/325,395 - Filed: 2011-12-14 - Published: 2013-06-20 - Earliest claimed: 2011-12-14 - Assignees: STATS ChipPAC, Ltd. - Inventors: Oh Han Kim; Haengcheol Choi; KyungOe Kim - Web page: https://patentgrep.com/patent/US20130154079A1 ## CPC - H10W 74/117: {the substrate having spherical bumps for external connection} - H10W 40/10: Arrangements for heating - H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)} - H10W 74/012: {of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills} - H10W 74/016: {using moulds} - H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills - H10W 72/877: {Bump connectors and die-attach connectors} - H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a mold gate on an upper surface of the substrate; mounting an integrated circuit to the substrate; and forming an encapsulant encapsulating the integrated circuit, the encapsulant having disruption patterns emanating from the mold gate and underneath a bottom plane of the integrated circuit. ## Claims ### Claim 1 A method of manufacture of an integrated circuit packaging system comprising: providing a substrate; forming a mold gate on an upper surface of the substrate; mounting an integrated circuit to the substrate; and forming an encapsulant encapsulating the integrated circuit, the encapsulant having disruption patterns emanating from the mold gate and underneath a bottom plane of the integrated circuit. ### Claim 2 (depends on 1) The method as claimed in claim 1 wherein forming the encapsulant includes forming the encapsulant with the mold gate encompassing a corner of the encapsulant and extending beyond the encapsulant in two axes. ### Claim 3 (depends on 1) The method as claimed in claim 1 wherein forming the encapsulant includes forming the encapsulant with the mold gate in direct contact with only a single side of the encapsulant and extending past a corner of the encapsulant. ### Claim 4 (depends on 1) The method as claimed in claim 1 wherein forming the encapsulant includes forming the encapsulant with the mold gate in direct contact with a side of the encapsulant and not extending past a corner of the encapsulant. ### Claim 5 (depends on 1) The method as claimed in claim 1 wherein forming the encapsulant includes forming the encapsulant with the mold gate extending past multiple corners of the encapsulant. ### Claim 6 A method of manufacture of an integrated circuit packaging system comprising: providing a substrate; forming a mold gate on an upper surface of the substrate; mounting an integrated circuit to the substrate; forming an encapsulant encapsulating the integrated circuit, the encapsulant having disruption patterns emanating from the mold gate and underneath a bottom plane of the integrated circuit, and a flat side in direct contact with the mold gate; and connecting external interconnects below the substrate. ### Claim 7 (depends on 6) The method as claimed in claim 6 further comprising attaching a heat spreader to a top side of the encapsulant. ### Claim 8 (depends on 6) The method as claimed in claim 6 further comprising forming an under-fill between the integrated circuit and the substrate. ### Claim 9 (depends on 6) The method as claimed in claim 6 wherein forming the encapsulant includes forming the encapsulant having the disruption patterns overlapping. ### Claim 10 (depends on 6) The method as claimed in claim 6 further comprising attaching a heat spreader to the integrated circuit with a thermal interference material. ### Claim 11 An integrated circuit packaging system comprising: a substrate; a mold gate formed on an upper surface of the substrate; an integrated circuit mounted to the substrate; and an encapsulant encapsulating the integrated circuit and having disruption patterns emanating from the mold gate and underneath a bottom plane of the integrated circuit. ### Claim 12 (depends on 11) The system as claimed in claim 11 wherein the mold gate encompasses a corner of the encapsulant and extends beyond the encapsulant in two axes. ### Claim 13 (depends on 11) The system as claimed in claim 11 wherein the mold gate is in direct contact with only a single side of the encapsulant and extending past a corner of the encapsulant. ### Claim 14 (depends on 11) The system as claimed in claim 11 wherein the mold gate is in direct contact with a side of the encapsulant and does not extend past a corner of the encapsulant. ### Claim 15 (depends on 11) The system as claimed in claim 11 wherein the mold gate extends past multiple corners of the encapsulant. ### Claim 16 (depends on 11) The system as claimed in claim 11 further comprising: external interconnects connected below the substrate; and wherein: the encapsulant includes a flat side in direct contact with the mold gate. ### Claim 17 (depends on 16) The system as claimed in claim 16 further comprising a heat spreader attached to a top side of the encapsulant. ### Claim 18 (depends on 16) The system as claimed in claim 16 further comprising an under-fill between the integrated circuit and the substrate. ### Claim 19 (depends on 16) The system as claimed in claim 16 wherein the disruption patterns overlap. ### Claim 20 (depends on 16) The system as claimed in claim 16 further comprising a heat spreader attached to the integrated circuit with a thermal interference material.