# US 2013/0154060 A1 · Wafer and method of processing wafer

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- Number: US 2013/0154060 A1
- Document ID: US20130154060A1
- Status: Published application
- Kind: A1
- Application number: 13/328,346
- Filed: 2011-12-16
- Published: 2013-06-20
- Earliest claimed: 2011-12-16
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Tung-Ti YEH; Wu-Chang LIN; Chung-Yi HUANG; Ya Wen WU; Hui-Mei JAO; Ting-Chun WANG; Chia-Hung CHUNG
- Web page: https://patentgrep.com/patent/US20130154060A1

## CPC

- H10P 70/54: {Cleaning of wafer edges}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W 20/081: {by forming openings in the dielectric parts}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A wafer including a substrate, a dielectric layer over the substrate, and a conductive layer over the dielectric layer is disclosed. The substrate has a main portion. A periphery of the dielectric layer and the periphery of the main portion of the substrate are separated by a first distance. A periphery of the conductive layer and the periphery of the main portion of the substrate are separated by a second distance. The second distance ranges from about a value that is 0.5% of a diameter of the substrate less than the first distance to about a value that is 0.5% of the diameter greater than the first distance.

## Claims

### Claim 1

A wafer comprising:
a substrate having a main portion having a substantially constant thickness;
a dielectric layer over the substrate, a periphery of the dielectric layer and a periphery of the main portion being separated by a first distance; and
a conductive layer over the dielectric layer, a periphery of the conductive layer and the periphery of the main portion being separated by a second distance,
the second distance ranging from about a value that is 0.5% of a diameter of the substrate less than the first distance to about a value that is 0.5% of the diameter of the substrate greater than the first distance.

### Claim 2 (depends on 1)

The wafer of claim 1, wherein the first distance ranges from about 0.25% of the diameter of the substrate to about 0.45% of the diameter of the substrate.

### Claim 3 (depends on 1)

The wafer of claim 1, wherein
the diameter of the substrate is about 304.8 mm,
the first distance ranges from about 0.7 mm to about 1.3 mm, and
the second distance ranges from about 1.5 mm greater than the first distance to about 1.0 mm less than the first distance.

### Claim 4 (depends on 1)

The wafer of claim 1, wherein the conductive layer is a top metal layer.

### Claim 5 (depends on 4)

The wafer of claim 4, wherein the second distance ranges from about a value that equals the first distance to about the value that is 0.5% of the diameter of the substrate less than the first distance.

### Claim 6 (depends on 1)

The wafer of claim 1, wherein the conductive layer is an inter metal layer, and the second distance ranges from about a value that equals the first distance to about the value that is 0.5% of the diameter of the substrate greater than the first distance.

### Claim 7

A method of forming a semiconductor structure, comprising:
forming a layer of dielectric material over a substrate, the substrate having a main portion, and the main portion having a substantially constant thickness;
forming a photoresist layer over the layer of dielectric material;
removing an edge portion of the photoresist layer to form an edge-processed photoresist layer;
patterning the layer of dielectric material based on the edge-processed photoresist layer to form a patterned dielectric layer, a periphery of the patterned dielectric layer and a periphery of the main portion of the substrate being separated by a distance;
forming a conductive layer over the patterned dielectric layer, a periphery of the conductive layer being within about 0.5% of a diameter of the substrate to the periphery of the patterned dielectric layer.

### Claim 8 (depends on 7)

The method of claim 7, wherein the removal of the edge portion of the photoresist layer comprises:
spinning the substrate; and
spraying a solution at the edge portion of the photoresist layer to etch the edge portion of the photoresist layer.

### Claim 9 (depends on 8)

The method of claim 8, wherein the solution comprises H2SO4 or H2O2.

### Claim 10 (depends on 7)

The method of claim 7, wherein the formation of the conductive layer comprises:
electroplating a metallic layer over the patterned dielectric layer; and
removing an edge portion of the metallic layer to form the conductive layer.

### Claim 11 (depends on 10)

The method of claim 10, wherein the removal of the edge portion of the metallic layer comprises:
spinning the substrate; and
spraying a solution at the edge portion of the metallic layer to remove the edge portion of the metallic layer.

### Claim 12 (depends on 11)

The method of claim 11, wherein the solution comprises H2SO4 or H2O2.

### Claim 13 (depends on 7)

The method of claim 7, wherein the conductive layer is a top metal layer, and the conductive layer is formed to overlay the periphery of the patterned dielectric layer.

### Claim 14 (depends on 7)

The method of claim 7, wherein the conductive layer is an inter metal layer, and the conductive layer is formed to expose the periphery of the patterned dielectric layer.

### Claim 15

A method of processing a wafer including a substrate, the substrate having a flat portion, the method comprising:
forming a dielectric layer over the substrate, the dielectric layer having a dielectric layer area, and a periphery of the dielectric layer and a periphery of the flat portion of the substrate being separated by a distance ranging from about 0.25% to about 0.45% of a diameter of the substrate; and
forming a conductive layer over the dielectric layer, the conductive layer having a conductive layer area,
a ratio of the conductive layer area to the dielectric layer area ranging from about 99.5% to about 110%.

### Claim 16 (depends on 15)

The method of claim 15 wherein the formation of the dielectric layer comprises:
forming a layer of dielectric material over the substrate;
forming a photoresist layer over the layer of dielectric material;
spinning the substrate; and
spraying a solution at an edge portion of the photoresist layer to remove the edge portion of the photoresist layer.

### Claim 17 (depends on 16)

The method of claim 16, wherein the solution comprises H2SO4 or H2O2.

### Claim 18 (depends on 15)

The method of claim 15, wherein the formation of the conductive layer comprises:
electroplating a metallic layer over the dielectric layer;
spinning the substrate; and
spraying a solution at an edge portion of the metallic layer to remove the edge portion of the metallic layer.

### Claim 19 (depends on 18)

The method of claim 18, wherein the solution comprises H2SO4 or H2O2.

### Claim 20 (depends on 15)

The method of claim 15, wherein the conductive layer is a top metal layer, and the ratio of the conductive layer area to the dielectric layer area ranging from about 100% to about 110%.