# US 2013/0153901 A1 · BSI Image Sensor Chips and Methods for Forming the Same

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- Number: US 2013/0153901 A1
- Document ID: US20130153901A1
- Status: Published application
- Kind: A1
- Application number: 13/352,980
- Filed: 2012-01-18
- Published: 2013-06-20
- Earliest claimed: 2011-12-15
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Shiu-Ko JangJian; Kei-Wei Chen; Ying-Lang Wang
- Web page: https://patentgrep.com/patent/US20130153901A1

## CPC

- H10F 39/8057: {Optical shielding}
- H10F 39/024: {of coatings or optical elements}
- H10F 39/199: {Back-illuminated image sensors}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION

## Abstract

A device includes semiconductor substrate having a front side and a backside. A polysilicon layer is disposed on the backside of the semiconductor substrate. The polysilicon layer includes a portion doped with a p-type impurity. A dielectric layer is disposed on the backside of the semiconductor substrate, wherein the polysilicon layer is between the semiconductor substrate and the polysilicon layer.

## Claims

### Claim 1

A device comprising:
a semiconductor substrate comprising a front side and a backside;
a polysilicon layer on the backside of the semiconductor substrate, wherein the polysilicon layer comprises a portion doped with a p-type impurity; and
a dielectric layer on the backside of the semiconductor substrate, wherein the polysilicon layer is between the semiconductor substrate and the polysilicon layer.

### Claim 2 (depends on 1)

The device of claim 1 further comprising a first image sensor disposed on the front side of the semiconductor substrate.

### Claim 3 (depends on 2)

The device of claim 2 further comprising:
a second image sensor disposed on the front side of the semiconductor substrate; and
a metal shielding layer over and aligned to the first image sensor, wherein the second image sensor is not aligned to the metal shielding layer, and wherein the polysilicon layer is between the metal shielding layer and the semiconductor substrate, and is aligned to the first image sensor and the second image sensor.

### Claim 4 (depends on 1)

The device of claim 1 further comprising an oxide layer between and contacting a back surface of the semiconductor substrate and the polysilicon layer, wherein the oxide layer comprises an oxide of the material of the semiconductor substrate.

### Claim 5 (depends on 1)

The device of claim 1, wherein the polysilicon layer is in physical contact with the semiconductor substrate.

### Claim 6 (depends on 1)

The device of claim 1, where the polysilicon layer comprises:
a bottom layer;
a middle layer; and
an upper layer, wherein the middle layer is between the bottom layer and the upper layer, wherein the middle layer has a first concentration of the p-type impurity, and wherein second concentrations of the p-type impurity in the bottom layer and the upper layer are lower than the first concentration.

### Claim 7 (depends on 6)

The device of claim 6, wherein the bottom layer and the upper layer are substantially free from the p-type impurity.

### Claim 8

A device comprising:
a semiconductor substrate;
a first and a second image sensor at a front surface of the semiconductor substrate;
an oxide layer over and contacting a back surface of the semiconductor substrate;
a polysilicon layer over the oxide layer, wherein the polysilicon layer comprises a p-type impurity;
a metal shielding layer over the polysilicon layer, wherein the metal shielding layer is over and aligned to the first image sensor; and
a passivation layer over the metal shielding layer.

### Claim 9 (depends on 8)

The device of claim 8, wherein the p-type impurity is distributed to substantially an entirety of the polysilicon layer.

### Claim 10 (depends on 8)

The device of claim 8, wherein the p-type impurity is distributed to a middle layer of the polysilicon layer, and wherein an upper layer and a bottom layer of the polysilicon layer are substantially free from p-type impurities, and wherein the upper layer and a bottom layer are overlying and underlying the middle layer, respectively.

### Claim 11 (depends on 8)

The device of claim 8, wherein the metal shielding layer is not aligned to the second image sensor.

### Claim 12 (depends on 8)

The device of claim 8 further comprising a dielectric layer between the metal shielding layer and the polysilicon layer.

### Claim 13 (depends on 8)

The device of claim 8, wherein the oxide layer comprises an oxide of the material of the semiconductor substrate, and wherein the oxide layer is in physical contact with the back surface of the semiconductor substrate.

### Claim 14 (depends on 8)

The device of claim 8, wherein the metal shielding layer comprises aluminum copper.

### Claim 15

A method comprising:
grinding a backside of a semiconductor substrate, wherein a remaining portion of the semiconductor substrate has a back surface;
depositing a polysilicon layer over the back surface of the semiconductor substrate, wherein the polysilicon layer is on a backside of the semiconductor substrate; and
during the step of depositing the polysilicon layer, in-situ doping a p-type impurity into the polysilicon layer.

### Claim 16 (depends on 15)

The method of claim 15, wherein the step of depositing the polysilicon layer comprises:
depositing a first layer of the polysilicon layer, wherein no p-type impurity is doped during the step of depositing the first layer of the polysilicon layer; and
depositing a second layer of the polysilicon layer, wherein the p-type impurity is doped during the step of depositing the second layer of the polysilicon layer.

### Claim 17 (depends on 16)

The method of claim 16, wherein the second layer is over the first layer, and wherein the step of depositing the polysilicon layer further comprises depositing a third layer of the polysilicon layer over the second layer, and wherein no p-type impurity is doped during the step of depositing the third layer of the polysilicon layer.

### Claim 18 (depends on 15)

The method of claim 15 further comprising, after the grinding and before the step of depositing the polysilicon layer, performing a hydrogen anneal on the back surface of the semiconductor substrate.

### Claim 19 (depends on 18)

The method of claim 18, wherein during the hydrogen anneal, a back surface layer of the semiconductor substrate is oxidized to form an oxide layer.

### Claim 20 (depends on 15)

The method of claim 15 further comprising;
after the step of depositing the polysilicon layer, forming a dielectric layer over the polysilicon layer;
forming a metal shielding layer over the dielectric layer; and
patterning the metal shielding layer.