# US 2013/0153886 A1 · Semiconductor device and manufacturing method thereof

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- Number: US 2013/0153886 A1
- Document ID: US20130153886A1
- Status: Published application
- Kind: A1
- Application number: 13/477,868
- Filed: 2012-05-22
- Published: 2013-06-20
- Earliest claimed: 2011-12-15
- Assignees: National Chiao Tung University
- Inventors: Edward Yi. Chang; Yueh-Chin Lin; Chia-Hua Chang; Hai-Dang Trinh
- Web page: https://patentgrep.com/patent/US20130153886A1

## CPC

- H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)}
- H10D 1/66: Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors
- H10D 64/01358: {the insulator being formed after the semiconductor body, the semiconductor being a Group III-V material}
- H10P 14/6329: {using physical ablation of a target, e.g. physical vapour deposition or pulsed laser deposition}
- H10P 14/662: {Laminate layers, e.g. stacks of alternating high-k metal oxides (adhesion layers or buffer layers H10P14/6508, H10P14/6548)}
- H10P 14/69391: {the material containing aluminium, e.g. Al2O3}
- H10P 14/69396: {the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium}
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

The present invention relates to a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a III-V semiconductor layer; an aluminum oxide layer formed on the III-V semiconductor layer; and a lanthanide oxide layer formed on the aluminum oxide layer. The method of manufacturing a semiconductor device includes: forming an aluminum oxide layer between a III-V semiconductor layer and a lanthanide oxide layer so as to prevent an inter-reaction of atoms between the III-V semiconductor layer and the lanthanide oxide layer.

## Claims

### Claim 1

A metal-oxide-semiconductor device, comprising:
a III-V semiconductor layer;
an aluminum oxide layer formed on the III-V semiconductor layer; and
a lanthanide oxide layer formed on the aluminum oxide layer.

### Claim 2 (depends on 1)

The metal-oxide-semiconductor device as claimed in claim 1 further comprising a substrate, wherein the III-V semiconductor layer is disposed on the substrate.

### Claim 3 (depends on 2)

The metal-oxide-semiconductor device as claimed in claim 2 further comprising a metal back contact, wherein the substrate has a backside, and the metal back contact is disposed on the backside of the substrate.

### Claim 4 (depends on 1)

The metal-oxide-semiconductor device as claimed in claim 1 further comprising a metal layer disposed on the lanthanide oxide layer.

### Claim 5 (depends on 1)

The metal-oxide-semiconductor device as claimed in claim 1, wherein the III-V semiconductor layer is an InxGa1-xAs layer and the lanthanide oxide layer is one selected from a group consisting of a La2O3 layer, a Pr6O11 layer and a CeO2 layer.

### Claim 6 (depends on 1)

The metal-oxide-semiconductor device as claimed in claim 1, wherein the aluminum oxide layer has a thickness of no less than 1 nm and the lanthanide oxide layer has a thickness of no less than 5 nm.

### Claim 7

A semiconductor device, comprising:
a semiconductor layer;
a dielectric layer disposed on the semiconductor layer, wherein there is an inter-reaction of atoms between the semiconductor layer and the dielectric layer; and
an aluminum oxide layer disposed between the semiconductor layer and the dielectric layer so as to inhibit the inter-reaction of atoms between the semiconductor layer and the dielectric layer.

### Claim 8 (depends on 7)

The semiconductor device as claimed in claim 7 further comprising a substrate, wherein the semiconductor layer is disposed on the substrate.

### Claim 9 (depends on 8)

The semiconductor device as claimed in claim 8 further comprising a metal back contact, wherein the substrate has a backside, and the metal back contact is disposed on the backside of the substrate.

### Claim 10 (depends on 7)

The semiconductor device as claimed in claim 7 further comprising a metal layer disposed on the dielectric layer.

### Claim 11 (depends on 7)

The semiconductor device as claimed in claim 7, wherein the dielectric layer is a lanthanide oxide layer and the semiconductor layer is a III-V semiconductor layer.

### Claim 12 (depends on 11)

The semiconductor device as claimed in claim 11, wherein the III-V semiconductor layer is an InxGa1-xAs layer and the lanthanide oxide layer is one selected from a group consisting of a La2O3 layer, a Pr6O11 layer and a CeO2 layer.

### Claim 13 (depends on 11)

The semiconductor device as claimed in claim 11, wherein the lanthanide oxide layer has a thickness of no less than 5 nm.

### Claim 14 (depends on 7)

The semiconductor device as claimed in claim 7, wherein the aluminum oxide layer has a thickness of no less than 1 nm.

### Claim 15

A method of manufacturing a semiconductor device, comprising steps of:
providing a semiconductor layer and a dielectric layer; and
forming an aluminum oxide layer between the semiconductor layer and the dielectric layer so as to prevent an inter-reaction of atoms between the semiconductor layer and the dielectric layer.

### Claim 16 (depends on 15)

The method as claimed in claim 15, wherein the semiconductor layer has a surface, further comprising steps of:
processing the surface of the semiconductor layer;
forming the aluminum oxide layer on the processed surface of the semiconductor layer; and
forming the dielectric layer on the aluminum oxide layer.

### Claim 17 (depends on 15)

The method as claimed in claim 15, wherein the semiconductor layer is a III-V semiconductor and the dielectric layer is a lanthanide oxide layer.