# US 2013/0153885 A1 · Process for preparing an organic electronic device

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- Number: US 2013/0153885 A1
- Document ID: US20130153885A1
- Status: Published application
- Kind: A1
- Application number: 13/820,318
- Filed: 2011-08-05
- Published: 2013-06-20
- Earliest claimed: 2010-09-02
- Assignees: Merck Patent GmbH
- Inventors: David Christoph Mueller; Toby Cull; Pawel Miskiewicz; Miguel Carrasco-Orozco
- Web page: https://patentgrep.com/patent/US20130153885A1

## CPC

- H10K 71/13: using printing techniques, e.g. ink-jet printing or screen printing
- H10K 10/462: {Insulated gate field-effect transistors [IGFETs]}
- H10K 10/471: {the gate dielectric comprising only organic materials}
- H10K 71/191: {characterised by provisions for the orientation or alignment of the layer to be deposited}
- H10K 10/464: {Lateral top-gate IGFETs comprising only a single gate}
- H10K 10/466: {Lateral bottom-gate IGFETs comprising only a single gate}
- H10K 71/12: using liquid deposition, e.g. spin coating
- H10K 71/40: Thermal treatment, e.g. annealing in the presence of a solvent vapour
- H10K 77/10: Substrates, e.g. flexible substrates
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

The present invention relates to a process for preparing improved electronic devices, in particular organic field effect transistors (OFETs), with patterned insulator and organic semiconductor layers.

## Claims

### Claim 1

Process for preparing an organic electronic device, comprising the steps of
depositing an insulator layer comprising a cross-linkable dielectric material onto a substrate or onto another layer of said OE device,
exposing one or more areas of the insulator layer to a first radiation dosage, or to a first thermal energy, that causes partial but not complete cross-linking of the dielectric material,
exposing one or more, but not all, areas of the insulator layer to a second radiation dosage, or to a second thermal energy, that causes a higher degree of cross-linking of the dielectric material than the exposure to the first radiation dosage or the first thermal energy,
wherein the sequence of the two exposure steps can also be reversed,
depositing an organic semiconductor (OSC) layer onto at least a part of the insulator layer,
so that the OSC layer is in direct contact with at least a part of the areas of the insulator layer having a higher degree of cross-linking of the dielectric material.

### Claim 2 (depends on 1)

Process according to claim 1, characterized in that it comprises, before the first exposure step, the step of partially cross-linking the dielectric material in one or more, but not all, areas of the insulator layer, thereby providing a pattern of areas that are cross-linked and areas that are not cross-linked, wherein the cross-linking is sufficient to provide solvent resistance.

### Claim 3 (depends on 2)

Process according to claim 2, characterized in that it comprises, after the first and second exposure steps, the step of removing any remaining dielectric material that was not cross-linked in the previous steps, for example by a solvent rinse.

### Claim 4 (depends on 1)

Process according to claim 1, characterized in that it comprises the following steps
a) depositing a gate electrode onto a substrate,
b) depositing an insulator layer comprising a cross-linkable dielectric material onto the gate electrode and/or the substrate, optionally followed by annealing the dielectric material,
b1) optionally patterning the insulator layer to leave areas that contain cross-linked dielectric material and areas that do not contain cross-linked dielectric material, wherein the degree of cross-linking of the dielectric material is sufficient to provide solvent resistance, preferably by exposing the insulator layer to photoradiation through a photomask or shadow mask or by exposing the the insulator layer to thermal energy using a thermal laser to heat only selected areas,
c) exposing the insulator layer to a first radiation dosage or first thermal energy that causes partial cross-linking of the cross-linkable dielectric material,
d) exposing some, but not all areas of the insulator layer to a second radiation dosage or a second thermal energy that causes a higher degree of cross-linking of the cross-linkable dielectric material material than in step c),
d1) optionally removing any remaining dielectric material that was not cross-linked in the previous steps, preferably by a solvent rinse,
e) depositing source and drain electrodes onto the insulator layer,
f) depositing an OSC layer onto the source and drain electrodes and the insulator layer, optionally followed by annealing the OSC layer, wherein optionally step d) is carried out before step c), and/or optionally step f) is carried out before step e), and
wherein the area between the source electrode and the drain electrode is the channel area, and the OSC layer is in direct contact with the insulator layer at least in the channel area or at least in an area that is entirely superposed by the channel area,
F) depositing an organic semiconductor layer onto the source and drain electrodes and the insulator layer,

### Claim 5 (depends on 4)

Process according to claim 4, characterized in that the area(s) of the insulator layer that are exposed to a second radiation dosage or second thermal energy include the area which is superposed to the channel area, and optionally include those areas which are superposed to the source electrode or the drain electrode.

### Claim 6 (depends on 1)

Process according to claim 1, characterized in that it comprises the following steps
aa) an insulator layer containing the cross-linkable dielectric material is deposited on a substrate,
bb) some, but not all areas of the insulator layer are exposed to a higher dosage of photoradiation that causes cross-linking of the dielectric material, and other areas are exposed to a lower dosage of said photoradiation,
cc) source and drain electrodes are formed, with the channel region between the source and drain lying on top of the patterned area of the insulator layer,
dd) a layer of an OSC material is deposited onto the insulator layer and the source and drain electrodes,
ee) an organic gate insulator (OGI) layer is deposited onto the OSC layer,
ff) a gate electrode is formed on the OGI layer.

### Claim 7 (depends on 1, 2, 3, 4, 5, 6)

Process according to one or more of claims 1 to 6 claim 1, characterized in that the radiation is UV radiation.

### Claim 8 (depends on 1)

Process according to claim 1, characterized in that the second radiation dosage is the same as or higher than the first radiation dosage.

### Claim 9 (depends on 1)

Process according to claim 1, characterized in that in the second exposure step the insulator layer is selectively protected by a patterned protective layer, a photomask or a shadow mask, which prevents selected areas of the insulator at least partially from being exposed to the second radiation dosage.

### Claim 10 (depends on 1)

Process according to claim 1, characterized in that the insulator layer is a gate insulator layer or an interlayer.

### Claim 11 (depends on 1)

Process according to claim 1, characterized in that the insulator layer comprises a cross-linkable dielectric material selected from photocross-linkable or thermally cross-linkable dielectric polymers, polyvinyl cinnamates or polycycloolefins comprising cross-linkable moieties, preferably epoxy, maleimide, coumarin or indane moieties.

### Claim 12 (depends on 1)

Process according to claim 1, characterized in that the organic semiconductor layer comprises an optionally substituted polyacene, and optionally further comprises an organic binder.

### Claim 13 (depends on 1)

Electronic device obtained by a process according to claim 1.

### Claim 14 (depends on 13)

Electronic device according to claim 13, characterized in that it is a top gate or bottom gate organic field effect transistor.