# US 2013/0153872 A1 · Thin-film transistor substrate and method for fabricating the same, display > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0153872 A1 - Document ID: US20130153872A1 - Status: Published application - Kind: A1 - Application number: 13/714,976 - Filed: 2012-12-14 - Published: 2013-06-20 - Earliest claimed: 2011-12-16 - Assignees: Chimei Innolux Corporation; Innocom Technology (Shenzhen) Co., Ltd. - Inventors: Szu-Wei LAI - Web page: https://patentgrep.com/patent/US20130153872A1 ## CPC - H10P 50/667: {by liquid etching only} - H10D 30/67: Thin-film transistors [TFT] {(Stacked nanowire, nanosheet or nanoribbon FETs H10D30/501)} - H10D 30/6729: {characterised by the electrodes} - H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes} - H10D 30/6737: {characterised by the electrode materials} - H10D 30/6739: {Conductor-insulator-semiconductor electrodes} - H10D 30/6743: {Silicon} - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/60: wherein the TFTs are in active matrices - H10H 20/062: {Light-emitting semiconductor devices having field effect type light-emitting regions, e.g. light-emitting High-Electron Mobility Transistors} - H10P 14/40: of conductive or resistive materials - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS ## Abstract The invention provides a thin-film transistor substrate, including: a substrate; a metal lead structure formed on the substrate, wherein the metal lead structure includes: a main conductor layer formed on the substrate, wherein the main conductor has a sidewall; a top conductor layer having a first portion, second portion and third portion, wherein the first portion is formed on the main conductor layer, the second portion is formed on the sidewall of the main conductor layer, and the third portion is formed on the substrate, and a continuous structure is formed by the first portion, the second portion and the third portion. ## Claims ### Claim 1 A thin-film transistor substrate, comprising: a substrate; and a metal lead structure formed on the substrate, wherein the metal lead structure comprises: a main conductor layer formed on the substrate, wherein the main conductor has a sidewall; and a top conductor layer having a first portion, second portion and a third portion, wherein the first portion is formed on the main conductor layer, the second portion is formed on the sidewall of the main conductor layer, and the third portion is formed on the substrate, and a continuous structure is made by the first portion, the second portion and the third portion. ### Claim 2 (depends on 1) The thin-film transistor substrate as claimed in claim 1, wherein the top conductor layer has a uniform thickness. ### Claim 3 (depends on 1) The thin-film transistor substrate as claimed in claim 1, wherein the top conductor layer is a non-conformal layer. ### Claim 4 (depends on 1) The thin-film transistor substrate as claimed in claim 1, wherein there is a gap between the second portion of the top conductor layer and the sidewall of the main conductor layer. ### Claim 5 (depends on 1) The thin-film transistor substrate as claimed in claim 1, wherein a sum of the length (d2) of the second portion of the top conductor layer and the length (d3) of the third portion of the top conductor layer is greater than the length (d4) of the sidewall of the main conductor layer ((d2+d3)>d4). ### Claim 6 (depends on 1) The thin-film transistor substrate as claimed in claim 1, further comprising: a bottom conductor layer formed between the substrate and the main conductor layer. ### Claim 7 (depends on 6) The thin-film transistor substrate as claimed in claim 6, wherein the bottom conductor layer comprises molybdenum (Mo), titanium (Ti), tantalum (Ta), Chromium (Cr) or combinations thereof. ### Claim 8 (depends on 1) The thin-film transistor substrate as claimed in claim 1, wherein the main conductor layer comprises aluminum (Al), copper (Cu) or combinations thereof. ### Claim 9 (depends on 1) The thin-film transistor substrate as claimed in claim 1, wherein the top conductor layer comprises molybdenum (Mo), titanium (Ti), tantalum (Ta), Chromium (Cr) or combinations thereof. ### Claim 10 (depends on 1) The thin-film transistor substrate as claimed in claim 1, wherein the metal lead structure is a gate line. ### Claim 11 (depends on 1) The thin-film transistor substrate as claimed in claim 1, wherein the metal lead structure is a data line. ### Claim 12 (depends on 1) The thin-film transistor substrate as claimed in claim 1, wherein the metal lead structure is a gate electrode. ### Claim 13 (depends on 1) The thin-film transistor substrate as claimed in claim 1, wherein the metal lead structure is a source/drain electrode. ### Claim 14 (depends on 1) A display, comprising: a thin-film transistor substrate as claimed in claim 1; a substrate disposed oppositely to the thin-film transistor substrate; and a display media formed between the thin-film transistor substrate and the substrate. ### Claim 15 (depends on 14) The display as claimed in claim 14, wherein the display media is a liquid crystal layer or an organic emitting layer. ### Claim 16 A method for fabricating a thin-film transistor substrate, comprising: providing a substrate; sequentially forming a main conductor layer and a top conductor layer on the substrate; forming a patterned photoresist layer on the top conductor layer; performing a first etching step to remove a portion of the main conductor layer and a portion of the top conductor layer and to expose sidewall of the main conductor layer and the substrate; performing a second etching step, wherein an etching rate of the main conductor layer is larger than that of the top conductor layer to make the top conductor layer extend downward to cover the main conductor layer, and the top conductor layer has a first portion formed on the main conductor layer, a second portion formed on the sidewall of the main conductor layer, a third portion formed on the substrate, and a continuous structure is made by the first portion, the second portion and the third portion; and removing the patterned photoresist layer. ### Claim 17 (depends on 16) The method for fabricating a thin-film transistor substrate as claimed in claim 16, before forming the main conductor layer, further comprising forming a bottom conductor layer on the substrate. ### Claim 18 (depends on 16) The method for fabricating a thin-film transistor substrate as claimed in claim 16, wherein the first etching step is performed by using an acid solution as etchant. ### Claim 19 (depends on 16) The method for fabricating a thin-film transistor substrate as claimed in claim 16, wherein the second etching step is performed by using an acid solution as etchant with a spraying etching mode or a dip etching mode. ### Claim 20 (depends on 16) The method for fabricating a thin-film transistor substrate as claimed in claim 16, wherein the second etching step is performed by using a base solution as etchant.