# US 2013/0153853 A1 · Horizontally oriented and vertically stacked memory cells

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- Number: US 2013/0153853 A1
- Document ID: US20130153853A1
- Status: Published application
- Kind: A1
- Application number: 13/759,576
- Filed: 2013-02-05
- Published: 2013-06-20
- Earliest claimed: 2010-06-22
- Assignees: Micron Technology, Inc.
- Inventors: Timothy A. Quick; Eugene P. Marsh
- Web page: https://patentgrep.com/patent/US20130153853A1

## CPC

- H10B 63/84: {arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays}
- H10B 63/80: {Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays}
- H10B 63/845: {the switching components being connected to a common vertical conductor}
- H10N 70/026: {by physical vapor deposition, e.g. sputtering}
- H10N 70/821: {Device geometry}
- H10N 70/823: {adapted for essentially horizontal current flow, e.g. bridge type devices}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/841: {Electrodes}
- H10N 70/063: {by etching of pre-deposited switching material layers, e.g. lithography}
- H10N 70/20: Multistable switching devices, e.g. memristors
- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/881: {Switching materials}
- H10N 70/8828: {Tellurides, e.g. GeSbTe}
- H10N 70/8833: {Binary metal oxides, e.g. TaOx}
- H10N 70/8836: {Complex metal oxides, e.g. perovskites, spinels}
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

Horizontally oriented and vertically stacked memory cells are described herein. One or more method embodiments include forming a vertical stack having a first insulator material, a first memory cell material on the first insulator material, a second insulator material on the first memory cell material, a second memory cell material on the second insulator material, and a third insulator material on the second memory cell material, forming an electrode adjacent a first side of the first memory cell material and a first side of the second memory cell material, and forming an electrode adjacent a second side of the first memory cell material and a second side of the second memory cell material.

## Claims

### Claim 1

A memory device, comprising:
at least two vertically stacked memory cells, wherein the memory cells include:
a memory cell material;
a first electrode adjacent a first side of the memory cell material; and
a second electrode adjacent a second side of the memory cell material.

### Claim 2 (depends on 1)

The memory device of claim 1, wherein the first side is opposite the second side.

### Claim 3 (depends on 1)

The memory device of claim 1, wherein the memory cells include an insulator material adjacent a top and a bottom of the memory cell material.

### Claim 4 (depends on 3)

The memory device of claim 3, wherein the insulator material is a nitride dielectric material.

### Claim 5 (depends on 1)

The memory device of claim 1, wherein the memory cells are self-aligned memory cells.

### Claim 6 (depends on 1)

The memory device of claim 1, wherein the first electrode includes an access device contact.

### Claim 7 (depends on 1)

The memory device of claim 1, wherein the second electrode includes a metal material.

### Claim 8

A memory device, comprising:
a first vertical stack of memory cells and a second vertical stack of memory cells, wherein the memory cells in the first and second vertical stacks include:
a memory cell material;
an access device contact adjacent a first side of the memory cell material; and
a metal material adjacent a second side of the memory cell material.

### Claim 9 (depends on 8)

The memory device of claim 8, wherein the memory cell material in the memory cells in the first and second vertical stacks is adjacent an access device contact.

### Claim 10 (depends on 8)

The memory device of claim 8, wherein:
the memory cell material in the memory cells in the first vertical stack is adjacent a first access device contact; and
the memory cell material in the memory cells in the second vertical stack is adjacent a second access device contact.

### Claim 11 (depends on 8)

The memory device of claim 8, wherein the memory cells in the first vertical stack are separated from the memory cells in the second vertical stack by an insulator material.

### Claim 12 (depends on 11)

The memory device of claim 11, wherein the insulator material is an oxide dielectric material.

### Claim 13 (depends on 8)

The memory device of claim 8, wherein:
the memory cell material includes a recess formed therein; and
the metal material is in the recess.

### Claim 14 (depends on 8)

The memory device of claim 8, wherein the first and second vertical stacks include:
a first memory cell material;
a second memory cell material above the first memory cell material;
an access device contact adjacent a first side of the first memory cell material and a first side of the second memory cell material;
a first metal material adjacent a second side of the first memory cell material; and
a second metal material adjacent a second side of the second memory cell material.

### Claim 15

A memory device, comprising:
a first vertical stack of resistive memory cells and a second vertical stack of resistive memory cells, wherein each resistive memory cell in the first and second vertical stacks includes:
a resistive memory cell material;
a portion of an electrode adjacent a first side of the resistive memory cell material; and
a portion of an additional electrode adjacent a second side of the resistive memory cell material, wherein each resistive memory cell includes a portion of a different additional electrode.

### Claim 16 (depends on 15)

The resistive memory device of claim 15, wherein the resistive memory cell material is phase change material.

### Claim 17 (depends on 16)

The resistive memory device of claim 16, wherein the phase change material is a Germanium-Antimony-Tellurium material.

### Claim 18 (depends on 15)

The resistive memory device of claim 15, wherein the resistive memory cell material is a resistive random access memory cell material.

### Claim 19 (depends on 15)

The memory device of claim 15, wherein:
the electrode is an access device contact; and
the additional electrode is a metal line.

### Claim 20 (depends on 19)

The memory device of claim 19, wherein the metal line is a data line.