# US 2013/0153845 A1 · Nonvolatile resistive memory element with a metal nitride containing switching layer

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- Number: US 2013/0153845 A1
- Document ID: US20130153845A1
- Status: Published application
- Kind: A1
- Application number: 13/328,423
- Filed: 2011-12-16
- Published: 2013-06-20
- Earliest claimed: 2011-12-16
- Assignees: Intermolecular, Inc.
- Inventors: Yun Wang; Tony P. Chiang; Imran Hashim
- Web page: https://patentgrep.com/patent/US20130153845A1

## CPC

- H10N 70/883: {Oxides or nitrides}
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- H10N 70/021: {Formation of switching materials, e.g. deposition of layers}
- H10N 70/24: {based on migration or redistribution of ionic species, e.g. anions, vacancies}
- H10N 70/25: {based on bulk electronic defects, e.g. trapping of electrons}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/8836: {Complex metal oxides, e.g. perovskites, spinels}
- H10B 63/20: {comprising selection components having two electrodes, e.g. diodes}
- H10B 63/80: {Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays}
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A nonvolatile resistive memory element has a novel variable resistance layer that includes a metal nitride, a metal oxide-nitride, a two-metal oxide-nitride, or a multilayer stack thereof. One method of forming the novel variable resistance layer comprises an interlayer deposition procedure, in which metal oxide layers are interspersed with metal nitride layers and then converted into a substantially homogeneous layer by an anneal process. Another method of forming the novel variable resistance layer comprises an intralayer deposition procedure, in which various ALD processes are sequentially interleaved to form a metal oxide-nitride layer. Alternatively, a metal oxide is deposited, nitridized, and annealed to form the variable resistance layer or a metal nitride is deposited, oxidized, and annealed to form the variable resistance layer.

## Claims

### Claim 1

A nonvolatile memory element, comprising:
a first layer operable as an electrode layer;
a second layer operable as an electrode layer; and
a third layer operable as a variable resistance layer disposed between the first layer and the second,
wherein the third layer comprises a metal nitride layer, a metal oxide-nitride layer, a two-metal oxide-nitride layer, or a combination thereof, and
wherein the metal is selected from the group of chemical elements consisting of hafnium (Hf), zirconium (Zr), tantalum (Ta), titanium (Ti), vanadium (V), niobium (Nb), tungsten (W), and silicon (Si).

### Claim 2 (depends on 1)

The nonvolatile memory element of claim 1, wherein the third layer comprises a multilayer stack.

### Claim 3 (depends on 2)

The nonvolatile memory element of claim 2, wherein the multilayer stack comprises a metal oxide-nitride layer.

### Claim 4 (depends on 1)

The nonvolatile memory element of claim 1, wherein the two-metal oxide-nitride layer comprises silicon and another metallic chemical element.

### Claim 5 (depends on 1)

The nonvolatile memory element of claim 1, wherein the third layer comprises a layer of at least one material selected from the group consisting of HfNx, ZrNx, SiNx, AlNx, HfOxNy, ZrOxNy, AlOxNy, TaOxNy, HfxSiyOzN(1-x-y-z), ZrxSiyOzN(1-x-y-z), HfxZryOzN(1-x-y-z), and HfxAlyOzN(1-x-y-z).

### Claim 6 (depends on 1)

The nonvolatile memory element of claim 1, wherein the third layer has a thickness that is between about 10 and 100 angstroms (Å).

### Claim 7

A method of forming a nonvolatile memory element, the method comprising:
forming a first layer, wherein the first layer is operable as an electrode;
depositing a second layer comprising a metal layer above the first layer using an atomic layer deposition (ALD) process;
oxidizing the metal layer of the second layer by heating the metal layer while exposing the metal layer to an oxygen-containing gas;
depositing a third layer comprising a metal layer above the oxidized second layer using an ALD process;
diffusing nitrogen into the metal layer of the third layer by exposing the metal layer of the third layer to a nitrogen-containing gas; and
forming a fourth layer operable as an electrode, so that the second layer and the third layer are disposed between the first layer and the fourth layer.

### Claim 8 (depends on 7)

The method of claim 7, wherein oxidizing the metal layer of the second layer comprises fully oxidizing the metal layer.

### Claim 9 (depends on 7)

The method of claim 7, wherein diffusing nitrogen into the metal layer of the third layer comprises fully nitridizing the metal layer of the third layer.

### Claim 10 (depends on 7)

The method of claim 7, further comprising performing a thermal anneal process to form a substantially homogeneous material from the oxidized metal layer of the second layer and the nitridized metal layer of the third layer.

### Claim 11 (depends on 7)

The method of claim 7, wherein the metal layer of the second layer and the metal of the third layer comprise different metallic chemical elements.

### Claim 12 (depends on 11)

The method of claim 11, wherein one of the second layer and the third layer comprises silicon.

### Claim 13 (depends on 11)

The method of claim 11, wherein the second layer and the third layer each comprise at least one of the chemical elements selected from the group of elements consisting of hafnium (Hf), zirconium (Zr), aluminum (Al), tantalum (Ta) titanium (Ti), vanadium (V), niobium (Nb), and tungsten (W).

### Claim 14

A method of forming a nonvolatile memory element, the method comprising:
forming a first layer operable as an first electrode layer;
depositing a second layer comprising a metal layer above the first layer using an ALD process;
oxidizing the metal layer of the second layer by heating the metal layer while exposing the metal layer to an oxygen-containing gas;
diffusing nitrogen into the metal layer of the second layer by exposing the metal layer to a reactive nitrogen-containing gas; and
forming a third layer operable as a an electrode layer, so that the metal layer of the second layer is disposed between the first layer and the third layer.

### Claim 15 (depends on 14)

The method of claim 14, wherein exposing the metal layer of the second layer to a reactive nitrogen-containing gas is performed concurrently with exposing the metal layer to an oxygen-containing gas.

### Claim 16 (depends on 14)

The method of claim 14, further comprising depositing a fourth layer comprising a metal layer above the second layer and between the first and third layers, wherein the fourth layer is deposited using an ALD process.[0073][0074]

### Claim 17 (depends on 16)

The method of claim 16, wherein the step of depositing the metal layer of the fourth layer above the second layer is performed prior to the step of oxidizing the metal layer of the second layer and prior to the step of diffusing nitrogen into the metal layer of the second layer.

### Claim 18 (depends on 16)

The method of claim 16, wherein the step of depositing the metal layer of the fourth layer above the second layer is performed after the step of oxidizing the metal layer of the second layer and after the step of diffusing nitrogen into the metal layer of the second layer, and wherein the metal layer of the fourth layer comprises a different chemical element than the metal layer of the second layer.

### Claim 19 (depends on 18)

The method of claim 18, further comprising diffusing nitrogen into the metal layer of the fourth layer by exposing the metal layer of the fourth layer to a reactive nitrogen-containing gas.

### Claim 20

A method of forming a nonvolatile memory element, the method comprising:
forming a first layer operable as an electrode;
depositing a second layer comprising a metal oxide layer above the first layer;
performing a nitridization process on the metal oxide layer of the second layer to form a metal oxide-nitride layer; and
forming a third layer operable as an electrode layer, so that the metal oxide-nitride nitride layer of the second layer is disposed between the first layer and the third layer.