# US 2013/0153266 A1 · Printed circuit board and method of manufacturing the same

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- Number: US 2013/0153266 A1
- Document ID: US20130153266A1
- Status: Published application
- Kind: A1
- Application number: 13/719,036
- Filed: 2012-12-18
- Published: 2013-06-20
- Earliest claimed: 2011-12-19
- Assignees: Samsung Electro-Mechanics Co., Ltd.
- Inventors: Jin Gul Hyun; Jin Gu Kim; Young Do Kweon; Hyung Jin Jeon
- Web page: https://patentgrep.com/patent/US20130153266A1

## CPC

- H05K 1/0296: {Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295 (H05K1/11 takes precedence; lay-out adapted to mounted component configuration H05K1/18)}
- H05K 1/0216: {Reduction of cross-talk, noise or electromagnetic interference (grounding H05K1/0215)}
- H05K 3/02: in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K 3/4673: {Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer (similar methods for protective coatings H05K3/28)}
- H05K 2201/0391: Using different types of conductors
- H05K 2201/09781: Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

Disclosed herein is a printed circuit board, including: a base substrate; at least one circuit pattern formed on the base substrate; at least one dummy pattern formed on the base substrate; and an insulating layer formed on the circuit pattern and the dummy pattern, wherein a distance between adjacent patterns to each other among the circuit patterns and the dummy patterns meets the following Equation 1. D ≤ T   2 T   1 × 200 1.2 [ Equation   1 ] (Where D represents a distance between adjacent patterns to each other among the circuit patterns and the dummy patterns, T1 represents a thickness of the circuit pattern or the dummy pattern, and T2 represents a maximum thickness of the insulating layer formed on the circuit pattern or the dummy pattern.)

## Claims

### Claim 1

A printed circuit board, comprising:
at least one circuit pattern formed on the base substrate;
at least one dummy pattern formed on the base substrate; and
an insulating layer formed on the circuit pattern and the dummy pattern;
wherein a distance between adjacent patterns to each other among the circuit patterns and the dummy patterns meets the following Equation 1.
D
≤
T


2
T


1
×
200
1.2
[
Equation


1
]
(Where D represents a distance between adjacent patterns to each other among the circuit patterns and the dummy patterns, T1 represents a thickness of the circuit pattern or the dummy pattern, and T2 represents a maximum thickness of the insulating layer formed on the circuit pattern or the dummy pattern.)

### Claim 2 (depends on 1)

The printed circuit board as set forth in claim 1, wherein a difference between the maximum thickness and a minimum thickness of the insulating layer is 3 μm or less.

### Claim 3 (depends on 1)

The printed circuit board as set forth in claim 1, wherein the thickness of the insulating layer is 100 μm or less.

### Claim 4 (depends on 1)

The printed circuit board as set forth in claim 1, wherein the base substrate is an organic substrate or an organic composite substrate.

### Claim 5 (depends on 1)

The printed circuit board as set forth in claim 1, further comprising:
a build up layer formed on or beneath the base substrate and including at least one circuit pattern and at least one insulating layer.

### Claim 6

A printed circuit board, comprising:
a base substrate including a first region and a second region;
at least one first circuit pattern formed on the base substrate;
at least one dummy pattern formed on the base substrate;
an insulating layer formed on the first circuit pattern and the dummy pattern; and
at least one second circuit pattern formed on the insulating layer,
wherein in interval between adjacent patterns to each other among the first circuit patterns and the dummy patterns in the first region meets the following Equation 2,
a distance between adjacent patterns to each other among the first circuit patterns and the dummy patterns in the second region meets the following Equation 3, and
a minimum height of the insulating layer formed in the first region is formed to be larger than a maximum height of the insulating layer formed in the second region.
D


1
≤
T


2
T


1
×
200
1.2
[
Equation


2
]
D


2
>
T


2
T


1
×
200
1.2
[
Equation


3
]
(Where D1 represents a distance between adjacent patterns to each other among the first circuit patterns and the dummy patterns in the first region, D2 represents a distance between adjacent patterns to each other among the first circuit patterns and the dummy patterns in the first region, T1 represents a thickness of the first circuit pattern or the dummy pattern, and T2 represents a maximum thickness of the insulating layer formed on the first circuit pattern or the dummy pattern.)

### Claim 7 (depends on 6)

The printed circuit board as set forth in claim 6, wherein a difference between the maximum height and the minimum height of the insulating layer in the first region is 3 μm or less.

### Claim 8 (depends on 1)

The printed circuit board as set forth in claim 1, wherein the thickness of the insulating layer is 100 μm or less.

### Claim 9 (depends on 6)

The printed circuit board as set forth in claim 6, wherein the base substrate is an organic substrate or an organic composite substrate.

### Claim 10

A method of manufacturing a printed circuit board, comprising:
preparing a base substrate;
forming at least one circuit pattern and at least one dummy pattern on the base substrate; and
forming an insulating layer on the circuit pattern and the dummy pattern by a slit die coating method,
wherein a distance between adjacent patterns to each other among the circuit patterns and the dummy patterns meets the following Equation 1.
D
≤
T


2
T


1
×
200
1.2
[
Equation


1
]
(Where D represents a distance between adjacent patterns to each other among the circuit patterns and the dummy patterns, T1 represents a thickness of the circuit pattern or the dummy pattern, and T2 represents a maximum thickness of the insulating layer formed on the circuit pattern or the dummy pattern.)

### Claim 11 (depends on 10)

The method as set forth in claim 10, wherein in the forming of the insulating layer, a difference between a maximum height and a minimum height of the insulating layer is formed to be 3 μm or less.

### Claim 12 (depends on 10)

The method as set forth in claim 10, wherein in the forming of the insulating layer, the thickness of the insulating layer is 100 μm or less.

### Claim 13 (depends on 10)

The method as set forth in claim 10, wherein the base substrate is an organic substrate or an organic composite substrate.

### Claim 14 (depends on 10)

The method as set forth in claim 10, further comprising: after the forming of the insulating layer, forming a build up layer including at least one circuit pattern and at least one insulating layer on at least one of a lower portion of the base substrate and an upper portion of the insulating layer.

### Claim 15

A method of manufacturing printed circuit board, comprising:
preparing a base substrate including a first region and a second region;
forming at least one first circuit pattern and at least one dummy pattern on the base substrate;
forming an insulating layer on the first circuit pattern and the dummy pattern by a slit die coating method; and
forming at least one second circuit pattern on the insulating layer,
wherein a distance between adjacent patterns to each other among the first circuit patterns and the dummy patterns in the first region meets the following Equation 2,
a distance between adjacent patterns to each other among the first circuit patterns and the dummy patterns in the second region meets the following Equation 3, and
a minimum height of the insulating layer formed in the first region is formed to be larger than a maximum height of the insulating layer formed in the second region.
D


1
≤
T


2
T


1
×
200
1.2
[
Equation


2
]
D


2
>
T


2
T


1
×
200
1.2
[
Equation


3
]
(Where D1 represents a distance between adjacent patterns to each other among the first circuit patterns and the dummy patterns in the first region, D2 represents a distance between adjacent patterns to each other among the first circuit patterns and the dummy patterns in the first region, T1 represents a thickness of the first circuit pattern or the dummy pattern, and T2 is a maximum thickness formed on the first circuit pattern or the dummy pattern.)

### Claim 16 (depends on 15)

The method as set forth in claim 15, wherein in the forming of the insulating layer, the insulating layer is formed in the first region so that a difference between a maximum height and a minimum height of the insulating layer is 3 μm or less.

### Claim 17 (depends on 15)

The method as set forth in claim 15, wherein in the forming of the insulating layer, the thickness of the insulating layer is 100 μm or less.

### Claim 18 (depends on 15)

The method as set forth in claim 15, wherein the base substrate is an organic substrate or an organic composite substrate.