Divider circuitry with quotient prediction based on estimated partial remainder

A method comprising:

• configuring divider circuitry to iteratively determine bits of a quotient over multiple stages of computation;
• and
• estimating a partial remainder for a given one of the stages;
• and
• predicting one or more of the quotient bits for one or more subsequent stages based on the estimated partial remainder so as to allow one or more computations to be skipped for said one or more subsequent stages.

A system comprising:

• at least one processing device comprising at least one integrated circuit;
• wherein the integrated circuit comprises divider circuitry configured to perform a division operation;
• wherein said divider circuitry iteratively determines bits of a quotient over multiple stages of computation;
• and
• wherein said divider circuitry is configured to estimate a partial remainder for a given one of the stages and to predict one or more of the quotient bits for one or more subsequent stages based on the estimated partial remainder so as to allow one or more computations to be skipped for said one or more subsequent stages.