Embedded logic analyzer

A data processor, comprising:

• a plurality of data processing functional blocks;
• an embedded logic analyzer having a sequence processing unit including a state logic unit module that provides state machines for saving state conditions of said data processing functional blocks and triggering sequences of states with corresponding actions based on True/False evaluation of state conditions, and a configuration register that allows a user to select among a plurality of configurations of said state machines;
• and
• a clock signal generator for providing a clock signal at a first clock frequency that is the fastest clock signal amongst a plurality of distributed clock signals of the data processor,
• wherein said configurations of said state machines that can be selected by said configuration register include different combinations of said first clock frequency and a second clock frequency that is a sub-multiple of said first clock frequency for processing different sequences of states and synchronizing state conditions of said state machine in respective configurations.