# US 2013/0097442 A1 · Mobile device chip and mobile device controlling method therefor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2013/0097442 A1 - Document ID: US20130097442A1 - Status: Published application - Kind: A1 - Application number: 13/275,528 - Filed: 2011-10-18 - Published: 2013-04-18 - Earliest claimed: 2011-10-18 - Assignees: Mediatek Inc. - Inventors: Chih-Ping Lin - Web page: https://patentgrep.com/patent/US20130097442A1 ## CPC - G06F 13/28: using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) - G06F 1/324: by lowering clock frequency - G06F 1/3287: by switching off individual functional units in the computer system - G06F 1/3293: by switching to a less power-consuming processor, e.g. sub-CPU - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract A mobile device chip is provided. The mobile device chip includes a main processor, a multimedia processor, and a direct memory access (DMA) circuit. The multimedia processor is electrically coupled to the main processor. The DMA circuit accesses storage, and the DMA circuit is electrically coupled to the multimedia processor. When the mobile device chip operates in a normal mode, the main processor provides file accessing information of at least part of an audio file stored in the storage to the multimedia processor. When the mobile device chip operates in a power-saving mode, the multimedia processor obtains the data of the at least part of the audio file stored in the storage through the DMA circuit according to the file accessing information provided by the main processor. ## Claims ### Claim 1 A mobile device chip, comprising: a main processor; a multimedia processor, electrically coupled to the main processor; and a direct memory access (DMA) circuit, for accessing storage, the DMA circuit being electrically coupled to the multimedia processor; wherein when the mobile device chip operates in a normal mode, the main processor provides file accessing information of at least part of an audio file stored in the storage to the multimedia processor; wherein when the mobile device chip operates in a power-saving mode, the multimedia processor obtains the data of the at least part of the audio file stored in the storage through the DMA circuit according to the file accessing information provided by the main processor. ### Claim 2 (depends on 1) The mobile device chip according to claim 1, wherein when only audio task is to be served, and the mobile device chip operates in the power-saving mode. ### Claim 3 (depends on 1) The mobile device chip according to claim 1, further comprising a clock control unit and a phase locked loop (PLL), the clock control unit controlling the PLL and electrically connected to the main processor and the multimedia processor, wherein when the mobile device chip operates in the normal mode, the PLL is activated and the clock control unit provides a first clock signal and a second clock signal to the main processor and the multimedia processor, respectively, based on a third clock signal generated by the PLL; wherein when the mobile device chip operates in the power-saving mode, the main processor enters a sleep mode and the PLL is non-activated, and the clock control unit provides a fourth clock signal to the multimedia processor whose frequency is lower than the frequency of the second clock signal, based on the reference clock signal. ### Claim 4 (depends on 1) The mobile device chip according to claim 1, wherein the file accessing information comprising a physical sector table (PST) which carrying a plurality of PST entries, each PST entry catalogs the physical address of one block data in the storage. ### Claim 5 (depends on 4) The mobile device chip according to claim 4, wherein when the amount of PST entries is below a first threshold when the mobile device chip operates in the power-saving mode, the mobile device chip is changed to operate in the normal mode to make the main processor provide the file accessing information to the multimedia processor again. ### Claim 6 (depends on 1) The mobile device chip according to claim 1, wherein the main processor comprises: a sleep controller; a first storage driver, for managing the storage; and an audio driver, for managing audio playing tasks or audio playback tasks in the main processor when the mobile device chip operates in the normal mode, wherein the audio driver further detects if any non-audio tasks is to be executed, if no, the audio driver gets the file accessing information from the first storage driver, transfers the file accessing information to the multimedia processor, and informs the sleep controller to set the mobile device chip to the power-saving mode. ### Claim 7 (depends on 6) The mobile device chip according to claim 6, wherein the multimedia processor comprises: a second storage driver, for being responsible to read operation of the storage when the mobile device chip is in the power-saving mode; and an audio decoder, for decoding data from the audio driver when the mobile device chip is in the normal mode, and decoding data from the second storage driver when the mobile device chip is in the power-saving mode, wherein the decoded data is outputted to a speaker for playing. ### Claim 8 (depends on 7) The mobile device chip according to claim 7, wherein the second storage driver is only for being responsible to read operation of the storage when the mobile device chip is in the power-saving mode. ### Claim 9 (depends on 7) The mobile device chip according to claim 7, wherein the mobile device chip further comprising an internal memory, the second storage driver reads the storage according to the file accessing information and stores the read data from the storage into the internal memory, and the audio decoder decodes the data stored in the internal memory when the mobile device chip is in the power-saving mode, wherein when the data stored in the internal memory is blow a second threshold, the second storage driver reads the storage again according to the file accessing information and stores the read data to the internal memory again. ### Claim 10 (depends on 1) The mobile device chip according to claim 1, wherein the mobile device chip is implemented for mobile communications devices. ### Claim 11 A mobile device controlling method, comprising: providing a mobile device chip comprising a main processor, a multimedia processor, and a direct memory access (DMA) circuit, the multimedia processor being electrically coupled to the main processor, the DMA circuit accessing storage and being electrically coupled to the multimedia processor; providing file accessing information of at least part of an audio file stored in the storage to the multimedia processor by the main processor when the mobile device chip operates in a normal mode; and obtaining the data of the at least part of the audio file stored in the storage through the DMA circuit according to the file accessing information by the multimedia processor when the mobile device chip operates in a power-saving mode. ### Claim 12 (depends on 11) The mobile device controlling method according to claim 11, wherein when no non-audio task is to be served, the mobile device chip operates in the power-saving mode. ### Claim 13 (depends on 11) The mobile device controlling method according to claim 11, wherein the mobile device chip further comprises a clock control unit and a PLL, the clock control unit controls the PLL and is electrically connected to the main processor and the multimedia processor, the method further comprises: activating the PLL when the mobile device chip operates in the normal mode; providing a first clock signal and a second clock signal to the main processor and the multimedia processor, respectively, based on a third clock signal generated by the PLL by the clock control unit when the mobile device chip operates in the normal mode, setting the main processor to enter a sleep mode and non-activating the PLL when the mobile device chip operates in the power-saving mode; and providing a fourth clock signal to the multimedia processor whose frequency is lower than the frequency of the second clock by the clock control unit when the mobile device chip operates in the power-saving mode. ### Claim 14 (depends on 11) The mobile device controlling method according to claim 11, wherein the file accessing information comprising a PST which carrying a plurality of PST entries, each PST entry catalogs the physical address of one block data in the storage. ### Claim 15 (depends on 14) The mobile device controlling method according to claim 14, wherein when the amount of PST entries is below a first threshold and when the mobile device chip operates in the power-saving mode, the mobile device chip is changed to operate in the normal mode to make the main processor provide the file accessing information to the multimedia processor again. ### Claim 16 (depends on 11) The mobile device controlling method according to claim 11, wherein the main processor comprises a first storage driver, for managing the storage, and an audio driver, for managing audio playback tasks in the main processor when the mobile device chip operates in the normal mode, the main processor comprises a sleep controller, the method further comprises: detecting if any non-audio tasks use the first storage driver by the audio driver, if no, getting the file accessing information from the first storage driver, transferring the file accessing information to the multimedia processor by the audio driver, and setting the mobile device chip to the power-saving mode by the sleep controller. ### Claim 17 (depends on 16) The mobile device controlling method according to claim 16, wherein the multimedia processor comprises a second storage driver and an audio decoder, the second storage driver is being responsible to read operation of the storage when the mobile device chip is in the power-saving mode, the method further comprising: decoding data from the audio driver by the audio decoder when the mobile device chip is in the normal mode, and decoding data from the second storage driver by the audio decoder when the mobile device chip is in the power-saving mode, wherein the decoded data is outputted to a speaker for playing. ### Claim 18 (depends on 17) The mobile device controlling method according to claim 17, wherein the second storage driver is only for being responsible to read operation of the storage when the mobile device chip is in the power-saving mode. ### Claim 19 (depends on 17) The mobile device controlling method according to claim 17, wherein the mobile device chip further comprising an internal memory, the method further comprising: reading the storage according the file accessing information and storing the read data from the storage into the internal memory by the second storage driver; decoding the data stored in the internal memory by the audio decoder when the mobile device chip is in the power-saving mode, and when the data stored in the internal memory is below a second threshold, reading the storage again according the file accessing information and storing the read data to the internal memory again by the second storage driver. ### Claim 20 (depends on 11) The mobile device controlling method according to claim 11, wherein the mobile device controlling method is for mobile communications devices.