Verifying Simulation Design Modifications
AssigneeInternational Business Machines Corporation
InventorsWolfgang Gellerich, Guenter Mayer, Chung-Lung K. Shum, Kai Weber
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AssigneeInternational Business Machines Corporation
InventorsWolfgang Gellerich, Guenter Mayer, Chung-Lung K. Shum, Kai Weber
Estimating the term…
A mechanism is provided for verifying design modifications to a simulation design unit included within a simulation model of an integrated electronic device. A modified description is received of a simulation design unit that failed to meet an expected physical property value during an initial simulation of the entire integrated electronic device. A simulation of the simulation design unit is executed using a list of identified input signals from a trace file. The trace file is generated during the initial simulation and indicates state values for the list of identified input signals. A determination is made as to whether the simulation of the simulation design unit fails to meet the expected physical property value. An indication is generated that modifications made to an initial description of the simulation design unit are successful in response to the simulation of the simulation design unit meeting the expected physical property value.
A method, in a data processing system, for verifying design modifications to a simulation design unit included within a simulation model of an integrated electronic device, the method comprising:
A computer program product comprising a computer readable storage medium having a computer readable program stored therein, wherein the computer readable program, when executed on a computing device, causes the computing device to:
An apparatus, comprising:
Dependencies are inferred from the claim text.