Junction leakage reduction through implantation
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Feng Nieh, Chung-Yi Yu, Hung-Ta Lin
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Abstract
Provided is a method of fabricating a semiconductor device. The method includes forming a first III-V family layer over a substrate. The first III-V family layer includes a surface having a first surface morphology. The method includes performing an ion implantation process to the first III-V family layer through the surface. The ion implantation process changes the first surface morphology into a second surface morphology. After the ion implantation process is performed, the method includes forming a second III-V family layer over the first III-V family layer. The second III-V family layer has a material composition different from that of the first III-V family layer.
Claims20
A method of fabricating a semiconductor device, comprising:
- forming a first III-V family layer over a substrate, the first III-V family layer including a surface having a first surface morphology;
- performing an ion implantation process to the first III-V family layer through the surface, the ion implantation process changing the first surface morphology into a second surface morphology;
- and
- after the ion implantation process is performed, forming a second III-V family layer over the first III-V family layer, wherein the second III-V family layer has a material composition different from that of the first III-V family layer.
A method of fabricating a semiconductor device, comprising:
- forming a first III-V family layer over a wafer;
- treating the first III-V family layer with a light implantation process, the light implantation process improving a surface morphology of the first III-V family layer;
- thereafter treating the first III-V family layer with a thermal process;
- and
- thereafter forming a second III-V family layer over the first III-V family layer, the first and second III-V family layers having different material compositions.
A method of fabricating a semiconductor device, comprising:
- forming a first semiconductor layer over a silicon substrate, the first semiconductor layer including at least one element from a III group of a periodic table and at least one element from a V group of the periodic table;
- implanting a plurality of dopant ions to the first semiconductor layer, the dopant ions including at least one element selected from the group consisting of:
- Argon, Carbon, Nitrogen, and Fluorine;
- performing a thermal treating process to the first semiconductor layer after the implanting, wherein the implanting and the performing the thermal treating process are carried out in a manner to alter a surface morphology of the first semiconductor layer;
- forming a second semiconductor layer over the first semiconductor layer, the second semiconductor layer including at least one element from the III group of the periodic table and at least one element from the V group of the periodic table, wherein the first and second semiconductor layers include different material compositions;
- and
- forming a transistor device at least partially in the second semiconductor layer.
Dependencies are inferred from the claim text.