Wafer level packaging of semiconductor chips
AssigneeATI Technologies ULC
InventorsNeil Mclellan, Adam Zbrzezny
Life of this patent
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Abstract
A method of manufacturing semiconductor packages at the wafer level is disclosed. A wafer has multiple integrated circuits (ICs) formed on its active surface, with each IC in communication with a plurality under-bump metallization (UBM) pads formed on one surface the package. The UBM pads include a larger pads near the center of package and smaller UBM pads near the periphery. The method includes attaching a stiffener to an inactive surface of the wafer; forming under bump metallization pads; and forming solder bumps extending from the UBM pads.
Claims10
A method of manufacturing semiconductor package from a wafer having at least one integrated circuit (IC) formed on an active surface, said method comprising:
- a) attaching a stiffener to an inactive surface of said wafer;
- b) forming substantially rectangular under bump metallization (UBM) pads, each one of said UBM pads in communication with said IC, said UBM pads comprising at least a first UBM pad, and a second UBM pad larger than said first UBM pad;
- c) forming solder bumps extending from each of said UBM pads;
- and
- d) separating said wafer into semiconductor packages.
A method of manufacturing semiconductor package from a wafer having at least one integrated circuit (IC) formed on an active surface, said method comprising:
- a) attaching a stiffener to an inactive surface of said wafer;
- b) forming a first plurality of UBM pads of a first size placed near a center of said active side spaced apart at a first pitch, and a second plurality of said UBM pads of a second size smaller than said first size and spaced apart at a second pitch, placed near a periphery of said active side;
- c) forming solder bumps extending from at least some of said UBM pads;
- and
- d) separating said wafer into semiconductor packages.
Dependencies are inferred from the claim text.