Apparatus and methods for performing block matching on a video stream

Abstract

A data processing system for processing a video stream comprises memory array circuitry, memory access circuitry, and video processing circuitry. The memory array circuitry is characterized by a width and a height. The memory access circuitry is operative to cause, through a series of write operations, a series of two-dimensional data representations of different respective regions in a frame of the video stream to be stored in the memory array circuitry. The write operations occur such that only data missing from the memory array circuitry is written to the memory array circuitry during each write operation and such that the data is written modulo at least one of the width and the height of the memory array circuitry. Lastly, the video processing circuitry is operative to perform block matching on the video stream at least in part utilizing the series of two-dimensional data representations stored in the memory array circuitry.

Dependencies are inferred from the claim text.