Back to results
US 2013/0094309 A1Published application
Tracking bit cell
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorBing WANG
Life of this patent
Estimating the term…
Abstract
A memory macro includes a tracking circuit and a plurality of memory cells. The tracking circuit has tracking transistors configured to receive a tracking voltage value. Each memory cell of the plurality of memory cells has memory transistors configured to receive a cell voltage value different from the tracking voltage value. The tracking circuit is configured to generate a tracking signal based on which a reading signal of a memory cell of the plurality of memory cells is generated.
Claims20
A memory macro comprising:
- a tracking circuit having tracking transistors configured to receive a tracking voltage value;
- and
- a plurality of memory cells, each memory cell of the plurality of memory cells having memory transistors configured to receive a cell voltage value different from the tracking voltage value,
- wherein the tracking circuit is configured to generate a tracking signal based on which a reading signal of a memory cell of the plurality of memory cells is generated.
1 more element
A method comprising:
- determining a plurality of first current values of a first current to be sunk by a tracking cell of a tracking circuit in response to a plurality of first voltage values of a first voltage applied to the tracking cell, each first current value of the plurality of first current values thereby corresponding to a first voltage value of the plurality of first voltage values;
- determining a second current value of a second current corresponding to a second voltage value of a second voltage of a memory cell of a plurality of memory cells;
- and
- selecting a third voltage value based on the second current value, a first current value of the plurality of first current values, and, a first voltage value corresponding to the first current value,
- wherein
- the selected third voltage value is for use in a tracking cell of the tracking circuit for generating a tracking signal for a memory cell to be accessed of the plurality of memory cells.
3 more elements
A method comprising:
- generating a first edge of a first tracking signal of a tracking cell;
- generating a first edge of a second tracking signal of the tracking cell based on the first edge of the first tracking signal;
- generating a first edge of a first cell signal of a memory cell;
- generating a second edge of the first tracking signal based on the first edge of the second tracking signal;
- generating a second edge of the first cell signal based on the second edge of the first tracking signal,
- wherein
- a transistor in the tracking cell operates at a tracking voltage value;
- and
- a transistor in the memory cell operates at a memory voltage value different from the tracking voltage value.
6 more elements
Dependencies are inferred from the claim text.