Phase change memory device having multi-level and method of driving the same
AssigneeSK hynix Inc.
InventorsHae Chan PARK, Se Ho LEE
Life of this patent
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Abstract
A phase change memory device having a multi-level and a method of driving the same are presented. The disclosed phase change memory device includes variable resistors and shifting units. The variable resistors are interchanged into set and reset states in response to an applied current. The shifting units, which are connected to the variable resistors, shift resistance distribution in the set and reset state of the variable resistors by a predetermined level.
Claims39
A phase change memory device comprising:
- a cell array including a plurality of memory cells,
- wherein the memory cell includes:
- first switching elements connected to first word lines;
- second switching elements connected between the first switching elements and second word lines;
- and
- variable resistors connected between the first switching elements and bit lines.
A phase change memory device comprising:
- a cell array that includes a plurality of memory cells including first and second word lines intersecting bit lines;
- and
- a control block arranged outside the cell array and configured to control the bit lines and the word lines;
- wherein the memory cell includes variable resistors connected to the bit lines and shifting units connected to the variable resistors and the shifting units are configured to be controlled by the first and second word lines.
A phase change memory device comprising:
- a semiconductor substrate having peripheral areas and a cell area therebetween;
- first and second word line select switches on an upper part of the semiconductor substrate in the peripheral areas;
- first word lines electrically connected to the first word line select switches, the first word lines on the upper part of the semiconductor substrate on which the first word line select switches are formed;
- first diodes on the upper parts of the first word lines;
- second word lines on the upper parts of the first diodes;
- second diodes on the upper parts of the second word lines correspondingly aligned over the first diodes;
- heating electrodes correspondingly coupled to upper parts of the second diodes;
- phase change patterns correspondingly coupled to upper parts of the heating electrodes;
- and
- bit lines correspondingly coupled to upper parts of the phase change patterns.
A method of driving a phase change memory device that includes variable resistors that reversibly interchange into set and reset states in response to a current applied from bit lines, shifting units connected to the variable resistors and exhibits shift resistance distribution in the set and reset states of the variable resistors by a predetermined level, and memory cells that include a plurality of word lines controlling the shifting units, the method of driving a phase change memory comprising:
- when writing and reading the memory cells,
- selecting and grounding one of the word lines, and
- supplying a writing and reading voltage via the bit lines to remaining word lines in a floating state.
A method of driving a phase change memory device that includes bit lines, variable resistors that are electrically connected to the bit lines, first switching elements that are connected to the variable resistors, second switching elements that are electrically connected to the first switching elements, and memory cells including first word lines that control the first switching elements and second word lines that control second switching elements, the method of driving a phase change memory comprising:
- when writing the memory cells, grounding the first word lines and writing a first set state and a first reset state by applying a set voltage and a reset voltage preset via the bit lines the second word lines are floating, and
- floating the first word line and writing a second set state and a second reset state by applying the set voltage and the reset voltage via the bit lines when the second word lines are grounded.
Dependencies are inferred from the claim text.