Semiconductor integrated circuit device
AssigneeRenesas Electronics Corporation
InventorsKazuo SAKAMOTO, Naozumi MORINO, Kazuo TANAKA, Hiroyasu ISHIZUKA
Life of this patent
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Abstract
A semiconductor integrated circuit device comprises I/O cells arranged around a core region. Each of the I/O cells comprises a level shifter circuit, an I/O logic circuit, and an I/O buffer circuit. An I/O logic region in which the I/O logic circuit is arranged and an I/O buffer region in which the I/O buffer circuit is arranged overlap with a region in which a pad for the I/O cell is arranged. The I/O logic region and the I/O buffer region are arranged side by side in a direction parallel to a side of the core region.
Claims8
A semiconductor integrated circuit device, comprising:
- I/O cells arranged around a core region, each of said I/O cells comprising a level shifter circuit, an I/O logic circuit, and an I/O buffer circuit, wherein
- an I/O logic region in which the I/O logic circuit is arranged and an I/O buffer region in which the I/O buffer circuit is arranged overlapping with a region in which a pad for the I/O cell is arranged, said I/O logic region and said I/O buffer region being arranged side by side in a direction parallel to a side of the core region.
Dependencies are inferred from the claim text.